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Bruno Endres Forlin
Bruno Endres Forlin
PhD Candidate University of Twente
Geverifieerd e-mailadres voor utwente.nl - Homepage
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Earthquake—A NoC-based optimized differential cache-collision attack for MPSoCs
C Reinbrecht, B Forlin, A Zankl, J Sepúlveda
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 648-653, 2018
172018
Guard-NoC: A protection against side-channel attacks for MPSoCs
C Reinbrecht, A Aljuffri, S Hamdioui, M Taouil, B Forlin, J Sepulveda
2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 536-541, 2020
122020
Cache timing attacks on NoC-based MPSoCs
C Reinbrecht, B Forlin, J Sepúlveda
Microprocessors and Microsystems 66, 1-9, 2019
102019
Providing Plug N'Play for Processing-in-Memory Accelerators
PC Santos, BE Forlin, L Carro
Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021
92021
Sim2pim: A fast method for simulating host independent & pim agnostic designs
PC Santos, BE Forlin, L Carro
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 226-231, 2021
62021
G-puf: An intrinsic puf based on GPU error signatures
B Forlin, R Husemann, L Carro, C Reinbrecht, S Hamdioui, M Taouil
2020 IEEE European Test Symposium (ETS), 1-2, 2020
52020
Sim2PIM: A complete simulation framework for processing-in-memory
BE Forlin, PC Santos, AE Becker, MAZ Alves, L Carro
Journal of Systems Architecture 128, 102528, 2022
42022
Attacking real-time mpsocs: Preemptive nocs are vulnerable
B Forlin, C Reinbrecht, J Sepúlveda
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration …, 2019
22019
Neutron Radiation Tests of the NEORV32 RISC-V SoC on Flash-Based FPGAs
K Böhmer, B Forlin, C Cazzaniga, P Rech, G Furano, N Alachiotis, ...
2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2023
12023
Security aspects of real-time MPSoCs: the flaws and opportunities of preemptive NoCs
B Forlin, C Reinbrecht, J Sepúlveda
VLSI-SoC: New Technology Enabler: 27th IFIP WG 10.5/IEEE International …, 2020
12020
36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
M Ottavi, G Furano, L Cassano, M Psarakis, L Dilillo, P Reviriego, S Liu, ...
2023
An unprotected RISC-V Soft-core processor on an SRAM FPGA: Is it as bad as it sounds?
BE Forlin, W van Huffelen, C Cazzaniga, P Rech, N Alachiotis, M Ottavi
2023 IEEE European Test Symposium (ETS), 1-6, 2023
2023
Plug N’PIM: An integration strategy for Processing-in-Memory accelerators
PC Santos, BE Forlin, MAZ Alves, L Carro
Integration 88, 185-195, 2023
2023
Aggressive Performance Improvement on Processing-in-Memory Devices by Adopting Hugepages
PC Santos, BE Forlin, MAZ Alves, L Carro
2022 IEEE 33rd International Conference on Application-specific Systems …, 2022
2022
Improving the efficiency of multi threaded processing in-memory
BE Forlin
2022
Sim2PIM: framework completo de simulação para processamento em memória
AE Becker, BE Forlin, PCS Silva Junior
2022
On the Aspects of MPSoCs Security: Avoiding Logical Attacks with Network-on-Chip
C Reinbrecht, B Forlin, J Sepulveda
The IEEE International Symposium on Circuits and Systems (ISCAS) 2019, 2019
2019
EGIS NoC: A secure-enhanced interconnection to prevent Architectural Channel Attacks
C Reinbrecht, B Forlin, A Zankl, J Sepulveda
Testmethoden und Zuverlässigkeit von Schaltungen und Systemen,{TUZ} 2018, 2018
2018
Geração e Transmissão de Transport Streams no Padrão SBTVD
BE Forlin
2016
36rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
AA Koufopoulou, A Papadimitriou, A Pikrakis, M Psarakis, D Hely, ...
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Artikelen 1–20