Da-Cheng Juan
Da-Cheng Juan
Google Research, National Tsing Hua University, Carnegie Mellon University
Verified email at dacheng.info
Cited by
Cited by
Dpp-net: Device-aware progressive search for pareto-optimal neural architectures
JD Dong, AC Cheng, DC Juan, W Wei, M Sun
Proceedings of the European Conference on Computer Vision (ECCV), 517-531, 2018
Monas: Multi-objective neural architecture search using reinforcement learning
CH Hsu, SH Chang, JH Liang, HP Chou, CH Liu, SC Chang, JY Pan, ...
arXiv preprint arXiv:1806.10332, 2018
Neuralpower: Predict and deploy energy-efficient convolutional neural networks
E Cai, DC Juan, D Stamoulis, D Marculescu
Asian Conference on Machine Learning, 622-637, 2017
Learning the optimal operating point for many-core systems with extended range voltage/frequency scaling
DC Juan, S Garg, J Park, D Marculescu
2013 International Conference on Hardware/Software Codesign and System …, 2013
Hyperpower: Power-and memory-constrained hyper-parameter optimization for neural networks
D Stamoulis, E Cai, DC Juan, D Marculescu
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 19-24, 2018
Power-aware performance increase via core/uncore reinforcement control for chip-multiprocessors
DC Juan, D Marculescu
Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012
Coco-gan: Generation by parts via conditional coordinating
CH Lin, CC Chang, YS Chen, DC Juan, W Wei, HT Chen
Proceedings of the IEEE/CVF International Conference on Computer Vision …, 2019
Synthesizer: Rethinking self-attention in transformer models
Y Tay, D Bahri, D Metzler, DC Juan, Z Zhao, C Zheng
arXiv preprint arXiv:2005.00743, 2020
Svr-noc: A performance analysis tool for network-on-chips using learning-based support vector regression model
Z Qian, DC Juan, P Bogdan, CY Tsui, D Marculescu, R Marculescu
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 354-357, 2013
Fine-Grained Sleep Transistor Sizing Algorithm for Leakage Power Minimization
DS Chiou, DC Juan, YT Chen, SC Chang
Design Automation Conference, 2007. DAC '07. 44th ACM/IEEE, 81 - 86, 2007
On the robustness of self-attentive models
YL Hsieh, M Cheng, DC Juan, W Wei, WL Hsu, CJ Hsieh
Proceedings of the 57th Annual Meeting of the Association for Computational …, 2019
An efficient wake-up schedule during power mode transition considering spurious glitches phenomenon
YT Chen, DC Juan, MC Lee, SC Chang
2007 IEEE/ACM International Conference on Computer-Aided Design, 779-782, 2007
Low-dimensional hyperbolic knowledge graph embeddings
I Chami, A Wolf, DC Juan, F Sala, S Ravi, C Ré
arXiv preprint arXiv:2005.00545, 2020
A learning-based autoregressive model for fast transient thermal analysis of chip-multiprocessors
DC Juan, H Zhou, D Marculescu, X Li
17th Asia and South Pacific Design Automation Conference, 597-602, 2012
Sparse sinkhorn attention
Y Tay, D Bahri, L Yang, D Metzler, DC Juan
International Conference on Machine Learning, 9438-9447, 2020
A2n: Attending to neighbors for knowledge graph inference
T Bansal, DC Juan, S Ravi, A McCallum
Proceedings of the 57th Annual Meeting of the Association for Computational …, 2019
A support vector regression (SVR)-based latency model for network-on-chip (NoC) architectures
ZL Qian, DC Juan, P Bogdan, CY Tsui, D Marculescu, R Marculescu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
A comprehensive and accurate latency model for network-on-chip performance analysis
Z Qian, DC Juan, P Bogdan, CY Tsui, D Marculescu, R Marculescu
2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC), 323-328, 2014
An efficient wake-up strategy considering spurious glitches phenomenon for power gating designs
DC Juan, YT Chen, MC Lee, SC Chang
IEEE transactions on very large scale integration (VLSI) systems 18 (2), 246-255, 2009
Beyond poisson: Modeling inter-arrival time of requests in a datacenter
DC Juan, L Li, HK Peng, D Marculescu, C Faloutsos
Pacific-Asia Conference on Knowledge Discovery and Data Mining, 198-209, 2014
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