| FinFET versus gate-all-around nanowire FET: Performance, scaling, and variability D Nagy, G Indalecio, AJ Garcia-Loureiro, MA Elmessary, K Kalna, ... IEEE Journal of the Electron Devices Society 6, 332-340, 2018 | 219 | 2018 |
| High mobility III-V MOSFETs for RF and digital applications M Passlack, P Zurcher, K Rajagopalan, R Droopad, J Abrokwah, M Tutt, ... 2007 IEEE International Electron Devices Meeting, 621-624, 2007 | 108 | 2007 |
| Benchmarking of FinFET, nanosheet, and nanowire FET architectures for future technology nodes D Nagy, G Espineira, G Indalecio, AJ Garcia-Loureiro, K Kalna, N Seoane IEEE Access 8, 53196-53202, 2020 | 95 | 2020 |
| Effects of self-heating on performance degradation in AlGaN/GaN-based devices B Benbakhti, A Soltani, K Kalna, M Rousseau, JC De Jaeger IEEE transactions on electron devices 56 (10), 2178-2185, 2009 | 79 | 2009 |
| Implementation of the density gradient quantum corrections for 3-D simulations of multigate nanoscaled transistors AJ Garcia-Loureiro, N Seoane, M Aldegunde, R Valin, A Asenov, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011 | 78 | 2011 |
| Scaling of pseudomorphic high electron mobility transistors to decanano dimensions K Kalna, S Roy, A Asenov, K Elgaid, I Thayne Solid-State Electronics 46 (5), 631-638, 2002 | 73 | 2002 |
| Random dopant, line-edge roughness, and gate workfunction variability in a nano InGaAs FinFET N Seoane, G Indalecio, E Comesana, M Aldegunde, AJ Garcia-Loureiro, ... IEEE Transactions on Electron Devices 61 (2), 466-472, 2013 | 61 | 2013 |
| 3D finite element Monte Carlo simulations of multigate nanoscale transistors M Aldegunde, AJ García-Loureiro, K Kalna IEEE transactions on electron devices 60 (5), 1561-1567, 2013 | 50 | 2013 |
| Quantum corrections based on the 2-D Schrödinger equation for 3-D finite element Monte Carlo simulations of nanoscaled FinFETs J Lindberg, M Aldegunde, D Nagy, WG Dettmer, K Kalna, ... IEEE Transactions on Electron Devices 61 (2), 423-429, 2014 | 48 | 2014 |
| Benchmarking of scaled InGaAs implant-free nanoMOSFETs K Kalna, N Seoane, AJ Garcia-Loureiro, IG Thayne, A Asenov IEEE transactions on electron devices 55 (9), 2297-2306, 2008 | 48 | 2008 |
| Comparison of fin-edge roughness and metal grain work function variability in InGaAs and Si FinFETs N Seoane, G Indalecio, M Aldegunde, D Nagy, MA Elmessary, ... IEEE Transactions on Electron Devices 63 (3), 1209-1216, 2016 | 46 | 2016 |
| Controlling the electrical transport properties of nanocontacts to nanowires AM Lord, TG Maffeis, O Kryvchenkova, RJ Cobley, K Kalna, ... Nano Letters 15 (7), 4248-4254, 2015 | 46 | 2015 |
| Scaling/LER study of Si GAA nanowire FET using 3D finite element Monte Carlo simulations MA Elmessary, D Nagy, M Aldegunde, N Seoane, G Indalecio, J Lindberg, ... Solid-State Electronics 128, 17-24, 2017 | 44 | 2017 |
| Drift-diffusion and hydrodynamic modeling of current collapse in GaN HEMTs for RF power application S Faramehr, K Kalna, P Igić Semiconductor Science and Technology 29 (2), 025007, 2014 | 43 | 2014 |
| Ballistic transport in Si, Ge, and GaAs nanowire MOSFETs M Bescond, N Cavassilas, K Kalna, K Nehari, L Raymond, JL Autran, ... IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005 | 40 | 2005 |
| Simulations of Statistical Variability in n-Type FinFET, Nanowire, and Nanosheet FETs N Seoane, JG Fernandez, K Kalna, E Comesana, A Garcia-Loureiro IEEE Electron Device Letters 42 (10), 1416-1419, 2021 | 39 | 2021 |
| Impact of body-thickness-dependent band structure on scaling of double-gate MOSFETs: A DFT/NEGF study A Martinez, K Kalna, PV Sushko, AL Shluger, JR Barker, A Asenov IEEE transactions on nanotechnology 8 (2), 159-166, 2008 | 39 | 2008 |
| Impact of gate edge roughness variability on FinFET and gate-all-around nanowire FET G Espineira, D Nagy, G Indalecio, AJ Garcia-Loureiro, K Kalna, N Seoane IEEE Electron Device Letters 40 (4), 510-513, 2019 | 38 | 2019 |
| Review of current status of III-V MOSFETs I Thayne, R Hill, M Holland, X Li, H Zhou, D Macintyre, S Thoms, K Kalna, ... ECS transactions 19 (5), 275, 2009 | 36 | 2009 |
| Impact of interface state trap density on the performance characteristics of different III–V MOSFET architectures B Benbakhti, JS Ayubi-Moak, K Kalna, D Lin, G Hellings, G Brammertz, ... Microelectronics Reliability 50 (3), 360-364, 2010 | 33 | 2010 |
Antonio Garcia-LoureiroDepartment of Electronics and Computer Science. Universidad de Santiago de CompostelaVerified email at usc.es
