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Omid Hashemipour
Omid Hashemipour
Verified email at sbu.ac.ir
Title
Cited by
Cited by
Year
Design of a novel reversible multiplier circuit using HNG gate in nanotechnology
M Haghparast, SJ Jassbi, K Navi, O Hashemipour
World Applied Sciences Journal 3 (6), 974-978, 2008
2382008
Two new low-power full adders based on majority-not gates
K Navi, MH Moaiyeri, RF Mirzaee, O Hashemipour, BM Nezhad
Microelectronics journal 40 (1), 126-130, 2009
1832009
A universal method for designing low‐power carbon nanotube FET‐based multiple‐valued logic circuits
MH Moaiyeri, RF Mirzaee, A Doostaregan, K Navi, O Hashemipour
IET Computers & Digital Techniques 7 (4), 167-181, 2013
1322013
Efficient CNTFET-based ternary full adder cells for nanoelectronics
MH Moaiyeri, RF Mirzaee, K Navi, O Hashemipour
Nano-Micro Letters 3, 43-50, 2011
942011
Design and evaluation of CNFET-based quaternary circuits
MH Moaiyeri, K Navi, O Hashemipour
Circuits, Systems, and Signal Processing 31, 1631-1652, 2012
842012
High speed capacitor-inverter based carbon nanotube full adder
K Navi, M Rashtian, A Khatir, P Keshavarzian, O Hashemipour
Nanoscale research letters 5, 859-862, 2010
772010
Enhancing transconductance of ultra‐low‐power two‐stage folded cascode OTA
M Akbari, O Hashemipour
Electronics Letters 50 (21), 1514-1516, 2014
522014
DCCII based frequency compensation method for three stage amplifiers
S Shahsavari, S Biabanifard, SMH Largani, O Hashemipour
AEU-International Journal of Electronics and Communications 69 (1), 176-181, 2015
512015
A 0.6-V, 0.4-µW bulk-driven operational amplifier with rail-to-rail input/output swing
M Akbari, O Hashemipour
Analog Integrated Circuits and Signal Processing 86, 341-351, 2016
442016
Design and analysis of folded cascode OTAs using Gm/Id methodology based on flicker noise reduction
M Akbari, O Hashemipour
Analog Integrated Circuits and Signal Processing 83, 343-352, 2015
442015
A high-speed current conveyor based current comparator
R Chavoshisani, O Hashemipour
Microelectronics Journal 42 (1), 28-32, 2011
402011
High-performance mixed-mode universal min-max circuits for nanotechnology
MH Moaiyeri, R Chavoshisani, A Jalali, K Navi, O Hashemipour
Circuits, Systems, and Signal Processing 31, 465-488, 2012
382012
Dramatically low-transistor-count high-speed ternary adders
RF Mirzaee, MH Moaiyeri, M Maleknejad, K Navi, O Hashemipour
2013 IEEE 43rd International Symposium on Multiple-Valued Logic, 170-175, 2013
362013
Improving power efficiency of a two-stage operational amplifier for biomedical applications
M Akbari, M Nazari, L Sharifi, O Hashemipour
Analog Integrated Circuits and Signal Processing 84, 173-183, 2015
352015
Differential cascode voltage switch (DCVS) strategies by CNTFET technology for standard ternary logic
RF Mirzaee, T Nikoubin, K Navi, O Hashemipour
Microelectronics Journal 44 (12), 1238-1250, 2013
352013
An efficient architecture for designing reverse converters based on a general three-moduli set
AS Molahosseini, K Navi, O Hashemipour, A Jalali
journal of Systems Architecture 54 (10), 929-934, 2008
342008
A 63‐dB gain OTA operating in subthreshold with 20‐nW power consumption
M Akbari, O Hashemipour
International Journal of Circuit Theory and Applications 45 (6), 843-850, 2017
332017
Systematic design of analog integrated circuits using ant colony algorithm based on noise optimization
M Akbari, M Shokouhifar, O Hashemipour, A Jalali, A Hassanzadeh
Analog Integrated Circuits and Signal Processing 86, 327-339, 2016
292016
Design of ultra-low-power CMOS amplifiers based on flicker noise reduction
M Akbari, S Biabanifard, O Hashemipour
2014 22nd Iranian conference on electrical engineering (ICEE), 403-406, 2014
292014
An ultra-low voltage, ultra-low power fully recycling folded cascode amplifier
M Akbari, O Hashemipour, A Javid
2014 22nd Iranian Conference on Electrical Engineering (ICEE), 514-518, 2014
292014
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