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Alexandra Lackmann Zimpeck
Alexandra Lackmann Zimpeck
Geverifieerd e-mailadres voor inf.ufrgs.br
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Predictive evaluation of electrical characteristics of sub-22 nm FinFET technologies under device geometry variations
C Meinhardt, AL Zimpeck, RAL Reis
Microelectronics Reliability 54 (9-10), 2319-2324, 2014
632014
Impact of PVT variability on 20 nm FinFET standard cells
AL Zimpeck, C Meinhardt, RAL Reis
Microelectronics Reliability 55 (9-10), 1379-1383, 2015
332015
Impact of gate workfunction fluctuation on FinFET standard cells
C Meinhardt, AL Zimpeck, R Reis
Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International …, 2014
252014
FinFET cells with different transistor sizing techniques against PVT variations
AL Zimpeck, C Meinhardt, G Posser, R Reis
Circuits and Systems (ISCAS), 2016 IEEE International Symposium on, 45-48, 2016
222016
Pros and Cons of Schmitt Trigger Inverters to Mitigate PVT Variability on Full Adders
SP Toledo, AL Zimpeck, R Reis, C Meinhardt
Circuits and Systems (ISCAS), 2018 IEEE International Symposium on, 1-5, 2018
162018
Evaluating the impact of environment and physical variability on the I ON current of 20nm FinFET devices
AL Zimpeck, C Meinhardt, R Reis
Power and Timing Modeling, Optimization and Simulation (PATMOS), 2014 24th …, 2014
132014
Permanent and single event transient faults reliability evaluation EDA tool
YQ de Aguiar, AL Zimpeck, C Meinhardt, R Reis
Microelectronics Reliability 64, 63-67, 2016
102016
Process Variability in FinFET standard cells with different transistor sizing techniques
AL Zimpeck, C Meinhardt, G Posser, R Reis
Electronics, Circuits, and Systems (ICECS), 2015 IEEE International …, 2015
72015
A Tool to Evaluate Stuck-Open Faults in CMOS Logic Gates
AL Zimpeck, C Meinhardt, PF Butzen
IEEE Transactions on Electron Devices 53 (11), 2816-2823, 2006
6*2006
Robustness of Sub-22nm multigate devices against physical variability
AL Zimpeck, Y Aguiar, C Meinhardt, R Reis
Circuits and Systems (ISCAS), 2017 IEEE International Symposium on, 1-4, 2017
52017
Geometric variability impact on 7nm Trigate combinational cells
AL Zimpeck, Y Aguiar, C Meinhardt, R Reis
Electronics, Circuits and Systems (ICECS), 2016 IEEE International …, 2016
52016
Análise do comportamento de portas lógicas CMOS com falhas Stuck-On em nanotecnologias
AL Zimpeck, C Meinhardt, PF Butzen
42014
Impact of schmitt trigger inverters on process variability robustness of 1-Bit full adders
SP Toledo, AL Zimpeck, R Reis, C Meinhardt
Electronics, Circuits and Systems (ICECS), 2017 24th IEEE International …, 2017
32017
A methodology to evaluate the Holding Time in CMOS Logic Gates with Stuck-Open Fault
AL Zimpeck, C Meinhardt, PF Butzen
3*2013
Robustness evaluation of finFET transistors under PVT variability
AL Zimpeck, C Meinhardt, R Reis
PhD Research in Microelectronics and Electronics Latin America (PRIME-LA), 1-4, 2017
22017
Impact of variability effects on FinFET transistors and combinational cells
AL Zimpeck, R Reis
Electronics, Circuits and Systems (ICECS), 2016 IEEE International …, 2016
22016
Analyzing the Impact of Frequency and Diverse Path Delays in the Time Vulnerability Factor of Master-Slave D Flip-Flops
AL Zimpeck, F Lima Kastensmidt, R Reis
VLSI (ISVLSI), 2015 IEEE Computer Society Annual Symposium on, 521-526, 2015
12015
ANÁLISE DO VOLTAGE SCALING EM PORTAS LÓGICAS XOR UTILIZANDO DISPOSITIVOS FINFET
LH Brendler, AL Zimpeck, YQ Aguiar
2017
Timing vulnerability factor analysis in master-slave D flip-flops
AL Zimpeck
2016
Reavaliando Falhas Stuck-Open em nanotecnologias sub-45nm: Uma análise comportamental
AL Zimpeck, C Meinhardt, PF Butzen
Iberchip 2014, 2014
2014
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Artikelen 1–20