| Latch-based structure: A high resolution and self-reference technique for hardware trojan detection G Zarrinchian, MS Zamani IEEE Transactions on Computers 66 (1), 100-113, 2016 | 35 | 2016 |
| Improving inter-node communications in multi-core clusters using a contention-free process mapping algorithm M Soryani, M Analoui, G Zarrinchian The Journal of Supercomputing 66, 488-513, 2013 | 9 | 2013 |
| A new process placement algorithm in multi-core clusters aimed to reducing network interface contention G Zarrinchian, M Soryani, M Analoui Advances in Computer Science, Engineering & Applications: Proceedings of the …, 2012 | 4 | 2012 |
| Combinational counters: A low overhead approach to address DPA attacks G Zarrinchian, MS Zamani Journal of Circuits, Systems and Computers 29 (06), 2050097, 2020 | 3 | 2020 |
| A novel process mapping strategy in clustered environments M Soryani, M Analoui, G Zarrinchian arXiv preprint arXiv:1207.2878, 2012 | 2 | 2012 |
| A chip activation protocol for preventing IC recycling G Zarrinchian Microprocessors and Microsystems 101, 104872, 2023 | | 2023 |
| Inverter-based MUX: A Low Overhead Approach for Logic Encryption G Zarrinchian Internatioanl Journal of Computer Engineering in Recent Trends 7 (7), 2020 | | 2020 |
Morteza Saheb ZamaniProfessor, Amirkabir University of TechnologyVerified email at aut.ac.ir
