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Kazuo Sakiyama
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Fault sensitivity analysis
Y Li, K Sakiyama, S Gomisawa, T Fukunaga, J Takahashi, K Ohta
Cryptographic Hardware and Embedded Systems, CHES 2010: 12th International …, 2010
3102010
Elliptic-curve-based security processor for RFID
YK Lee, K Sakiyama, L Batina, I Verbauwhede
IEEE Transactions on Computers 57 (11), 1514-1527, 2008
2962008
Low-cost elliptic curve cryptography for wireless sensor networks
L Batina, N Mentens, K Sakiyama, B Preneel, I Verbauwhede
European Workshop on Security in Ad-hoc and Sensor Networks, 6-17, 2006
1892006
A new arbiter PUF for enhancing unpredictability on FPGA
T Machida, D Yamamoto, M Iwamoto, K Sakiyama
The Scientific World Journal 2015 (1), 864812, 2015
952015
On the power of fault sensitivity analysis and collision side-channel attacks in a combined setting
A Moradi, O Mischke, C Paar, Y Li, K Ohta, K Sakiyama
Cryptographic Hardware and Embedded Systems–CHES 2011: 13th International …, 2011
942011
Information-theoretic approach to optimal differential fault analysis
K Sakiyama, Y Li, M Iwamoto, K Ohta
Information Forensics and Security, IEEE Transactions on 7 (1), 109-120, 2012
882012
Multicore curve-based cryptoprocessor with reconfigurable modular arithmetic logic units over GF (2^ n)
K Sakiyama, L Batina, B Preneel, I Verbauwhede
IEEE Transactions on Computers 56 (9), 1269-1282, 2007
842007
A new mode of operation for arbiter PUF to improve uniqueness on FPGA
T Machida, D Yamamoto, M Iwamoto, K Sakiyama
2014 Federated Conference on Computer Science and Information Systems, 871-878, 2014
802014
Oscillator without a combinatorial loop and its threat to FPGA in data centre
T Sugawara, K Sakiyama, S Nashimoto, D Suzuki, T Nagatsuka
Electronics Letters 55 (11), 640-642, 2019
792019
Fair and consistent hardware evaluation of fourteen round two SHA-3 candidates
M Knezevic, K Kobayashi, J Ikegami, S Matsuo, A Satoh, Ü Kocabas, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (5), 827-840, 2011
762011
Uniqueness enhancement of PUF responses based on the locations of random outputting RS latches
D Yamamoto, K Sakiyama, M Iwamoto, K Ohta, T Ochiai, M Takenaka, ...
Cryptographic Hardware and Embedded Systems–CHES 2011: 13th International …, 2011
712011
Implementation of double arbiter PUF and its performance evaluation on FPGA
T Machida, D Yamamoto, M Iwamoto, K Sakiyama
The 20th Asia and South Pacific Design Automation Conference, 6-7, 2015
642015
System for biometric signal processing with hardware and software acceleration
I Verbauwhede, P Schaumont, D Hwang, BC Lai, S Yang, K Sakiyama, ...
US Patent App. 10/554,763, 2007
632007
New fault-based side-channel attack using fault sensitivity
Y Li, K Ohta, K Sakiyama
IEEE Transactions on Information Forensics and Security 7 (1), 88-97, 2011
552011
Superscalar coprocessor for high-speed curve-based cryptography
K Sakiyama, L Batina, B Preneel, I Verbauwhede
International Workshop on Cryptographic Hardware and Embedded Systems, 415-429, 2006
552006
Variety enhancement of PUF responses using the locations of random outputting RS latches
D Yamamoto, K Sakiyama, M Iwamoto, K Ohta, M Takenaka, K Itoh
Journal of Cryptographic Engineering 3 (4), 197-211, 2013
522013
Practical improvements of side-channel attacks on AES: feedback from the 2nd DPA contest
C Clavier, JL Danger, G Duc, MA Elaabid, B Gérard, S Guilley, A Heuser, ...
Journal of Cryptographic Engineering 4, 259-274, 2014
502014
Elliptic curve cryptography on embedded multicore systems
J Fan, K Sakiyama, I Verbauwhede
Design Automation for Embedded Systems 12, 231-242, 2008
502008
A parallel processing hardware architecture for elliptic curve cryptosystems
K Sakiyama, E De Mulder, B Preneel, I Verbauwhede
2006 IEEE International Conference on Acoustics Speech and Signal Processing …, 2006
502006
Montgomery modular multiplication algorithm on multi-core systems
J Fan, K Sakiyama, I Verbauwhede
2007 IEEE Workshop on Signal Processing Systems, 261-266, 2007
492007
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Artikelen 1–20