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Ricardo Augusto da Luz Reis
Ricardo Augusto da Luz Reis
Verified email at inf.ufrgs.br
Title
Cited by
Cited by
Year
Fault-tolerance techniques for SRAM-based FPGAs
FL Kastensmidt, L Carro, RA da Luz Reis
Springer, 2006
3102006
Designing fault tolerant systems into SRAM-based FPGAs
F Lima, L Carro, R Reis
Proceedings of the 40th annual Design Automation Conference, 650-655, 2003
1962003
Radiation effects on embedded systems
R Velazco, P Fouillat, R Reis
Springer Science & Business Media, 2007
1692007
A fault injection analysis of Virtex FPGA TMR design methodology
F Lima, C Carmichael, J Fabula, R Padovani, R Reis
RADECS 2001. 2001 6th European Conference on Radiation and Its Effects on …, 2001
1652001
Designing fault-tolerant techniques for SRAM-based FPGAs
FG de Lima Kastensmidt, G Neuberger, RF Hentschke, L Carro, R Reis
IEEE design & test of computers 21 (6), 552-562, 2004
1632004
Analyzing area and performance penalty of protecting different digital modules with Hamming code and triple modular redundancy
R Hentschke, F Marques, F Lima, L Carro, A Susin, R Reis
Proceedings. 15th Symposium on Integrated Circuits and Systems Design, 95-100, 2002
1482002
A multiple bit upset tolerant SRAM memory
G Neuberger, F De Lima, L Carro, R Reis
ACM Transactions on Design Automation of Electronic Systems (TODAES) 8 (4 …, 2003
922003
Design of regular layouts to improve predictability
C Menezes, C Meinhardt, R Reis, R Tavares
2006 International Caribbean Conference on Devices, Circuits and Systems, 67-72, 2006
912006
An automatic technique for optimizing Reed-Solomon codes to improve fault tolerance in memories
G Neuberger, FG de Lima Kastensmidt, R Reis
IEEE design & test of computers 22 (1), 50-58, 2005
652005
Designing and testing fault-tolerant techniques for sram-based fpgas
FL Kastensmidt, G Neuberger, L Carro, R Reis
Proceedings of the 1st conference on Computing frontiers, 419-432, 2004
582004
Predictive evaluation of electrical characteristics of sub-22 nm FinFET technologies under device geometry variations
C Meinhardt, AL Zimpeck, RAL Reis
Microelectronics Reliability 54 (9-10), 2319-2324, 2014
532014
Predictive Evaluation of Electrical Characteristics of Sub-22nm Finfet Technologies Under Device Geometry Variations
R MEINHARDT, C., ZIMPECK, A., REIS
Microelectronics Reliability 54, 2014
532014
Circuit Design for Reliability
G REIS, R., CAO, Y., WIRTH
Springer, 2015
502015
Circuit Design for Reliability
G REIS, R., CAO, Y., WIRTH
Springer, 2015
502015
An Effective Method for Simultaneous Gate Sizing and Vth Assignment using Lagrangian Relaxation
Flach, Reimann, Posser, Johann, Reis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014
502014
An Effective Method for Simultaneous Gate Sizing and Vth Assignment using Lagrangian Relaxation
R FLACH, G., REIMANN, T., POSSER, G., JOHANN, G., REIS
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 33, 2014
502014
On the evolution of remote laboratories for prototyping digital electronic systems
LS Indrusiak, M Glesner, R Reis
IEEE Transactions on Industrial Electronics 54 (6), 3069-3077, 2007
452007
Revisiting automated physical synthesis of high-performance clock networks
MR Guthaus, G Wilke, R Reis
ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (2 …, 2013
442013
Predictive error detection by on-line aging monitoring
JC Vazquez, V Champac, AM Ziesemer, R Reis, J Semião, IC Teixeira, ...
2010 IEEE 16th International On-Line Testing Symposium, 9-14, 2010
442010
Built-in aging monitoring for safety-critical applications
JC Vazquez, V Champac, AM Ziesemer, R Reis, IC Teixeira, MB Santos, ...
2009 15th IEEE International On-Line Testing Symposium, 9-14, 2009
442009
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