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Sebastian Vogel
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Efficient hardware acceleration of CNNs using logarithmic data representation with arbitrary log-base
S Vogel, M Liang, A Guntoro, W Stechele, G Ascheid
2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018
612018
Automated design of error-resilient and hardware-efficient deep neural networks
C Schorn, T Elsken, S Vogel, A Runge, A Guntoro, G Ascheid
Neural Computing and Applications 32, 18327-18345, 2020
462020
Self-supervised quantization of pre-trained neural networks for multiplierless acceleration
S Vogel, J Springer, A Guntoro, G Ascheid
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019
322019
Efficient stochastic inference of bitwise deep neural networks
S Vogel, C Schorn, A Guntoro, G Ascheid
arXiv preprint arXiv:1611.06539, 2016
122016
Bit-shift-based accelerator for cnns with selectable accuracy and throughput
S Vogel, RB Raghunath, A Guntoro, K Van Laerhoven, G Ascheid
2019 22nd Euromicro Conference on Digital System Design (DSD), 663-667, 2019
92019
Efficient acceleration of cnns for semantic segmentation on fpgas
S Vogel, J Springer, A Guntoro, G Ascheid
Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019
92019
Guaranteed compression rate for activations in cnns using a frequency pruning approach
S Vogel, C Schorn, A Guntoro, G Ascheid
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 296-299, 2019
52019
Efficient hardware acceleration for approximate inference of bitwise deep neural networks
S Vogel, A Guntoro, G Ascheid
2017 Conference on Design and Architectures for Signal and Image Processing …, 2017
52017
Method for calculating an output of a neural network
C Schorn, S Vogel
US Patent 11,301,749, 2022
42022
A security scheme for dependable key insertion in mobile embedded devices
A Klimm, B Glas, M Wachs, S Vogel, KD Müller-Glaser, J Becker
International Journal of Reconfigurable Computing 2011, 1-19, 2011
42011
BOMP-NAS: Bayesian Optimization Mixed Precision NAS
D Van Son, F De Putter, S Vogel, H Corporaal
2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-2, 2023
32023
An end-to-end hw/sw co-design methodology to design efficient deep neural network systems using virtual models
MJ Klaiber, S Vogel, A Acosta, R Korn, L Ecco, K Back, A Guntoro, ...
Proceedings of the INTelligent Embedded Systems Architectures and …, 2019
32019
Hyperelliptic Curve Cryptoarchitecture for Fast Execution of Schnorr and Okamoto Authentication Protocols
A Klimm, S Vogel, J Becker
2011 IEEE International Symposium on Parallel and Distributed Processing …, 2011
22011
Quantization-Aware Neural Architecture Search with Hyperparameter Optimization for Industrial Predictive Maintenance Applications
N van de Waterlaat, S Vogel, HRT Rodriguez, W Sanberg, G Daalderop
2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-2, 2023
12023
Inference calculation for neural networks with protection against memory errors
A Guntoro, C Schorn, J Pletinckx, LL Ecco, S Vogel
US Patent App. 17/798,978, 2023
12023
Block-Level Surrogate Models for Inference Time Estimation in Hardware-Aware Neural Architecture Search
K Stolle, S Vogel, F van der Sommen, W Sanberg
Joint European Conference on Machine Learning and Knowledge Discovery in …, 2022
12022
Scaling Up Quantization-Aware Neural Architecture Search for Efficient Deep Learning on the Edge
Y Lu, HRT Rodriguez, S Vogel, N van de Waterlaat, P Jancura
arXiv preprint arXiv:2401.12350, 2024
2024
Method for block-level nn deployment metric modelling
WP Sanberg, SAA Vogel, KHW Stolle
US Patent App. 17/714,089, 2023
2023
Method and device for operating a neural network in a memory-efficient manner
A Guntoro, A Runge, C Schorn, J Topp, S Vogel, J Schirmer
US Patent 11,715,019, 2023
2023
Selective deactivation of processing units for artificial neural networks
J Schirmer, A Guntoro, A Runge, C Schorn, J Topp, S Vogel
US Patent 11,698,672, 2023
2023
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Artikelen 1–20