A runtime adaptive controller for supporting hardware components with variable latency C Pilato, VG Castellana, S Lovergine, F Ferrandi 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 153-160, 2011 | 28 | 2011 |
Instructions activating conditions for hardware-based auto-scheduling S Lovergine, F Ferrandi Proceedings of the 9th conference on Computing Frontiers, 253-256, 2012 | 8 | 2012 |
Dynamic AC-scheduling for hardware cores with unknown and uncertain information S Lovergine, F Ferrandi 2013 IEEE 31st International Conference on Computer Design (ICCD), 475-478, 2013 | 3 | 2013 |
Harnessing adaptivity analysis for the automatic design of efficient embedded and hpc systems S Lovergine, F Ferrandi 2013 IEEE International Symposium on Parallel & Distributed Processing …, 2013 | 2 | 2013 |
Parallelizing Irregular Applications through the YAPPA Compilation Framework S Lovergine, A Tumeo, O Villa, F Ferrandi Poster at Supercomputing (SC) 2013, 2013 | 1 | 2013 |
YAPPA: A compiler-based parallelization framework for irregular applications on MPSoCs S Lovergine, A Tumeo, O Villa, F Ferrandi 2013 International Symposium on Rapid System Prototyping (RSP), 123-129, 2013 | 1 | 2013 |
A design methodology for an innovative parallel controller in high level synthesis VG CASTELLANA, S LOVERGINE Politecnico di Milano, 2010 | | 2010 |
Power/Performance Characterization of Memory Intensive Applications on Emerging Manycore Architectures DG Chavarrıa-Miranda, S Lovergine, A Tumeo, JBM Franco, A Marquez | | |