Ĉthereal network on chip: concepts, architectures, and implementations K Goossens, J Dielissen, A Radulescu IEEE Design & Test of Computers 22 (5), 414-421, 2005 | 1235 | 2005 |
Trade-offs in the design of a router with both guaranteed and best-effort services for networks on chip E Rijpkema, K Goossens, A Rădulescu, J Dielissen, J van Meerbergen, ... IEE Proceedings-Computers and Digital Techniques 150 (5), 294-302, 2003 | 720 | 2003 |
Networks on chips L Benini, G De Micheli, TT Ye Morgan Kaufmann, 2006 | 368 | 2006 |
Predator: a predictable SDRAM memory controller B Akesson, K Goossens, M Ringhofer Proceedings of the 5th IEEE/ACM international conference on Hardware …, 2007 | 309 | 2007 |
An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration A Radulescu, J Dielissen, SG Pestana, OP Gangwal, E Rijpkema, ... IEEE Transactions on computer-aided design of integrated circuits and …, 2004 | 261 | 2004 |
T-CREST: Time-predictable multi-core architecture for embedded systems M Schoeberl, S Abbaspour, B Akesson, N Audsley, R Capasso, J Garside, ... Journal of Systems Architecture 61 (9), 449-471, 2015 | 260 | 2015 |
A design flow for application-specific networks on chip with guaranteed performance to accelerate SOC design and verification K Goossens, J Dielissen, OP Gangwal, SG Pestana, A Radulescu, ... Design, Automation and Test in Europe, 1182-1187, 2005 | 259 | 2005 |
CoMPSoC: A template for composable and predictable multi-processor system on chips A Hansson, K Goossens, M Bekooij, J Huisken ACM Transactions on Design Automation of Electronic Systems (TODAES) 14 (1 …, 2009 | 253 | 2009 |
The aethereal network on chip after ten years: Goals, evolution, lessons, and future K Goossens, A Hansson Proceedings of the 47th Design Automation Conference, 306-311, 2010 | 239 | 2010 |
A unified approach to constrained mapping and routing on network-on-chip architectures A Hansson, K Goossens, A Rǎdulescu Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware …, 2005 | 223 | 2005 |
A methodology for mapping multiple use-cases onto networks on chips S Murali, M Coenen, A Radulescu, K Goossens, G De Micheli Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006 | 213 | 2006 |
DRAMPower: Open-source DRAM power & energy estimation tool K Chandrasekar, C Weis, Y Li, B Akesson, N Wehn, K Goossens URL: http://www. drampower. info 22, 2012 | 208 | 2012 |
Networks on silicon: Combining best-effort and guaranteed services K Goossens, J van Meerbergen, A Peeters, R Wielage Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002 | 201 | 2002 |
Concepts and implementation of the Philips network-on-chip J Dielissen, A Radulescu, K Goossens, E Rijpkema IP-Based SoC Design, 1-6, 2003 | 180 | 2003 |
Bringing communication networks on a chip: test and verification implications B Vermeulen, J Dielissen, K Goossens, C Ciordas IEEE Communications Magazine 41 (9), 74-81, 2003 | 174 | 2003 |
An efficient on-chip network interface offering guaranteed services, shared-memory abstraction, and flexible network configuration A Radulescu, J Dielissen, K Goossens, E Rijpkema, P Wielage Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 157 | 2004 |
Cost-performance trade-offs in networks on chip: A simulation-based approach SG Pestana, E Rijpkema, A Radulescu, K Goossens, OP Gangwal Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 146 | 2004 |
Guaranteeing the quality of services in networks on chip K Goossens, J Dielissen, J van Meerbergen, P Poplavko, A Rădulescu, ... Networks on chip, 61-82, 2003 | 137 | 2003 |
Congestion-controlled best-effort communication for networks-on-chip JW van den Brand, C Ciordas, K Goossens, T Basten 2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007 | 135 | 2007 |
A router architecture for networks on silicon E Rijpkema, K Goossens, P Wielage Proceedings of Progress 2, 2001 | 134 | 2001 |