Chia-Lin Yang
Chia-Lin Yang
Professor of Computer Science and Information Engineering, National Taiwan University
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BioRoute: A network-flow-based routing algorithm for the synthesis of digital microfluidic biochips
PH Yuh, CL Yang, YW Chang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
Bioroute: A Network-Flow Based Routing Algorithm for Digital Microfluidic Biochips
PH Yuh, CL Yang, YW Chang
International Conference on Computer-Aided Design, 2007
Optimizing NAND flash-based SSDs via retention relaxation
RS Liu, CL Yang, W Wu
Target 11 (10), 00, 2012
Sparse reram engine: Joint exploration of activation and weight sparsity in compressed neural networks
TH Yang, HY Cheng, CL Yang, IC Tseng, HW Hu, HS Chang, HP Li
Proceedings of the 46th International Symposium on Computer Architecture …, 2019
NVM Duet: Unified working memory and persistent store architecture
RS Liu, DY Shen, CL Yang, SC Yu, CYM Wang
ACM SIGARCH Computer Architecture News 42 (1), 455-470, 2014
Multiprocessor energy-efficient scheduling with task migration considerations
JJ Chen, HR Hsu, KH Chuang, CL Yang, AC Pang, TW Kuo
Proceedings. 16th Euromicro Conference on Real-Time Systems, 2004. ECRTS …, 2004
Efficient and robust parallel dnn training through model parallelism on multi-gpu platform
CC Chen, CL Yang, HY Cheng
arXiv preprint arXiv:1809.02839, 2018
Low-power SRAM memory cell
YJ Chang, F Lai, CL Yang
US Patent 7,345,909, 2008
Age-based PCM wear leveling with nearly zero search cost
CH Chen, PC Hsiu, TW Kuo, CL Yang, CYM Wang
Proceedings of the 49th Annual Design Automation Conference, 453-458, 2012
Push vs. pull: Data movement for linked data structures
CL Yang, AR Lebeck
Proceedings of the 14th international conference on Supercomputing, 176-186, 2000
Placement of defect-tolerant digital microfluidic biochips using the T-tree formulation
PH Yuh, CL Yang, YW Chang
ACM Journal on Emerging Technologies in Computing Systems (JETC) 3 (3), 13-es, 2007
Zero-aware asymmetric SRAM cell for reducing cache power in writing zero
YJ Chang, F Lai, CL Yang
IEEE transactions on very large scale integration (VLSI) systems 12 (8), 827-836, 2004
A progressive-ILP based routing algorithm for cross-referencing biochips
PH Yuh, S Sapatnekar, CL Yang, YW Chang
Proceedings of the 45th annual Design Automation Conference, 284-289, 2008
Temporal floorplanning using the T-tree formulation
PH Yuh, CL Yang, YW Chang
IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 …, 2004
Power gating strategies on GPUs
PH Wang, CL Yang, YM Chen, YJ Cheng
ACM Transactions on Architecture and Code Optimization (TACO) 8 (3), 1-25, 2011
Obstacle-avoiding rectilinear Steiner tree construction based on spanning graphs
CW Lin, SY Chen, CF Li, YW Chang, CL Yang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
An energy-efficient virtual memory system with flash memory as the secondary storage
HW Tseng, HL Li, CL Yang
Proceedings of the 2006 international symposium on low power electronics and …, 2006
Energy-aware flash memory management in virtual memory system
HL Li, CL Yang, HW Tseng
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16 (8), 952-964, 2008
DL-RSIM: A simulation framework to enable reliable ReRAM-based accelerators for deep learning
MY Lin, HY Cheng, WT Lin, TH Yang, IC Tseng, CL Yang, HW Hu, ...
2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018
Memory latency reduction via thread throttling
HY Cheng, CH Lin, J Li, CL Yang
2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 53-64, 2010
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