Philip K.F. Hölzenspies
Philip K.F. Hölzenspies
Software Engineer, Facebook
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TitleCited byYear
Run-time spatial mapping of streaming applications to a heterogeneous multi-processor system-on-chip (MPSoC)
PKF Hölzenspies, JL Hurink, J Kuper, GJM Smit
Proceedings of the conference on Design, automation and test in Europe, 212-217, 2008
Fast, accurate and detailed NoC simulations
PT Wolkotte, PKF Hölzenspies, GJM Smit
Networks-on-Chip, 2007. NOCS 2007. First International Symposium on, 323-332, 2007
The chameleon architecture for streaming dsp applications
GJM Smit, ABJ Kokkeler, PT Wolkotte, PKF Hölzenspies, ...
EURASIP Journal on Embedded Systems 2007 (1), 11-11, 2007
Resource-Constrained Optimal Scheduling of Synchronous Dataflow Graphs via Timed Automata
W Ahmad, E de Groote, PKF Hölzenspies, MIA Stoelinga, JC van de Pol
Centre for Telematics and Information Technology, University of Twente, 2014
Reconfigurable Baseband Processing for Wireless Communications
ABJ Kokkeler, GK Rauwerda, PT Wolkotte, Q Zhang, PKF Hölzenspies, ...
CRC Press, 2009
Mapping streaming applications on a reconfigurable MPSoC platform at run-time
PKF Hölzenspies, GJM Smit, J Kuper
System-on-Chip, 2007 International Symposium on, 1-4, 2007
Run-time spatial resource management for real-time applications on heterogeneous MPSoCs
TD ter Braak, PKF Hölzenspies, J Kuper, JL Hurink, GJM Smit
Proceedings of the Conference on Design, Automation and Test in Europe, 357-362, 2010
A survey of offline algorithms for energy minimization under deadline constraints
MET Gerards, JL Hurink, PKF Hölzenspies
Journal of Scheduling, 1-17, 2016
Green computing: power optimisation of vfi-based real-time multiprocessor dataflow applications
W Ahmad, PKF Hölzenspies, M Stoelinga, J van de Pol
Digital System Design (DSD), 2015 Euromicro Conference on, 271-275, 2015
Analytic Clock Frequency Selection for Global DVFS
MET Gerards, JL Hurink, PKF Holzenspies, J Kuper, GJM Smit
Parallel, Distributed and Network-Based Processing (PDP), 2014 22nd …, 2014
Back to basics: Homogeneous representations of multi-rate synchronous dataflow graphs
R de Groote, PKF Holzenspies, J Kuper, H Broersma
Formal Methods and Models for Codesign (MEMOCODE), 2013 Eleventh IEEE/ACM …, 2013
Using an FPGA for fast bit accurate SoC simulation
PT Wolkotte, PKF Hölzenspies, GJM Smit
Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE …, 2007
S-Net Language Report 1.0
C Grelck, A Shafarenko, F Penczek, C Grelck, H Cai, J Julku, ...
Technical Report 487, University of Hertfordshire, School of Computer …, 2009
Introducing the PilGRIM: A Processor for Executing Lazy Functional Languages
A Boeijink, PKF Hölzenspies, J Kuper
Implementation and Application of Functional Languages, 54-71, 2011
An approximate maximum common subgraph algorithm for large digital circuits
JH Rutgers, PT Wolkotte, PKF Hölzenspies, J Kuper, GJM Smit
Digital System Design: Architectures, Methods and Tools (DSD), 2010 13th …, 2010
A communication model based on an n-dimensional torus architecture using deadlock-free wormhole routing
P Holzenspies, E Schepers, W Bach, M Jonker, B Sikkes, G Smit, ...
Digital System Design, 2003. Proceedings. Euromicro Symposium on, 166-172, 2003
Incremental Analysis of Cyclo-Static Synchronous Dataflow Graphs
RD Groote, PKF Hölzenspies, J Kuper, GJM Smit
ACM Transactions on Embedded Computing Systems (TECS) 14 (4), 68, 2015
Engineering Concurrent Software Guided by Statistical Performance Analysis.
C Grelck, K Hammond, H Hertlein, PKF Hölzenspies, CR Jesshope, ...
PARCO, 385-394, 2011
Run-time Spatial Mapping of Streaming Applications to Heterogeneous Multi-Processor Systems
PKF Hölzenspies, TD ter Braak, J Kuper, GJM Smit, JM Hurink
International Journal of Parallel Programming 38 (1), 68-83, 2010
Single-rate approximations of cyclo-static synchronous dataflow graphs
R de Groote, PKF Hölzenspies, J Kuper, GJM Smit
Proceedings of the 17th International Workshop on Software and Compilers for …, 2014
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