Hans G. Kerkhoff
Hans G. Kerkhoff
Geverifieerd e-mailadres voor utwente.nl
Geciteerd door
Geciteerd door
Testing microelectronic biofluidic systems
HG Kerkhoff
IEEE Design & Test of Computers 24 (1), 72-82, 2007
Multiple-valued logic charge-coupled devices
Kerkhoff, Tervoert
IEEE Transactions on computers 100 (9), 644-652, 1981
Testability analysis of analog systems
GJ Hemink, BW Meijer, HG Kerkhoff
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1990
Current-mode CMOS high-radix circuits
SP Onnewee
Proc, 16th Int. Symp, on Multiple-Valued Logic, 1986, 60-69, 1986
Testable design and testing of micro-electro-fluidic arrays
HG Kerkhoff, M Acar
Proceedings. 21st VLSI Test Symposium, 2003., 403-409, 2003
Fault modeling and fault simulation in mixed micro-fluidic microelectronic systems
HG Kerkhoff, HPA Hendriks
Journal of electronic testing 17, 427-437, 2001
Multiple-valued CCD circuits
JT Butler, HG Kerkhoff
Computer 21 (4), 58-69, 1988
Structural computer-aided design of current-mode CMOS logic circuits
S Onneweer, H Kerkhoff, JT Butler
Proc. of 18th Int. Symp. on Multiple-Valued Logic, 21-30, 1988
Synchronous full-scan for asynchronous handshake circuits
F Te Beest, A Peeters, K Van Berkel, H Kerkhoff
Journal of Electronic Testing 19, 397-406, 2003
Design and implementation of a hierarchical testable architecture using the boundary scan standard
RP Van Riessen, HG Kerkhoff, A Kloppenburg
1st European Test Conference, 1989, 1989
High-radix current-mode CMOS circuits based on the truncated-difference operator
SP Onneweer, HG Kerkhoff
Proc. 17th ISMVL, 188-195, 1987
Automatic scan insertion and test generation for asynchronous circuits
FT Beest, A Peeters, M Verra, K van Berkel, H Kerkhoff
Proceedings. International Test Conference, 804-813, 2002
Tackling test trade-offs from design, manufacturing to market using economic modeling
EH Volkerink, A Khoche, LA Kamas, J Rivoir, HG Kerkhoff
Proceedings International Test Conference 2001 (Cat. No. 01CH37260), 1098-1107, 2001
Exploiting multiple mahalanobis distance metrics to screen outliers from analog product manufacturing test responses
S Krishnan, HG Kerkhoff
IEEE Design & Test 30 (3), 18-24, 2013
Design of a high-radix programmable logic array using profiled peristaltic charge-coupled devices
HG Kerkhoff, JT Butler
Proceedings of the 16th international symposium on multiple-valued logic …, 1986
A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing
Y Zhao, HG Kerkhoff
2016 International Conference on Design and Technology of Integrated Systems …, 2016
Integration of the scan-test method into an architecture specific core-test approach
C Feige, JT Pierick, C Wouters, R Tangelder, HG Kerkhoff
Journal of Electronic Testing 14, 125-131, 1999
Analysis and design of an on-chip retargeting engine for IEEE 1687 networks
A Ibrahim, HG Kerkhoff
2016 21th IEEE European Test Symposium (ETS), 1-6, 2016
Testing philosophy behind the micro analysis system
HG Kerkhoff
Design, Test, and Microfabrication of MEMS and MOEMS 3680, 78-83, 1999
On-line dependability enhancement of multiprocessor SoCs by resource management
TD Ter Braak, ST Burgess, H Hurskainen, HG Kerkhoff, B Vermeulen, ...
2010 International Symposium on System on Chip, 103-110, 2010
Het systeem kan de bewerking nu niet uitvoeren. Probeer het later opnieuw.
Artikelen 1–20