| Speech enhancement using spectral subtraction-type algorithms: A comparison and simulation study N Upadhyay, A Karmakar Procedia Computer Science 54, 574-584, 2015 | 136 | 2015 |
| 2D-3D CNN based architectures for spectral reconstruction from RGB images S Koundinya, H Sharma, M Sharma, A Upadhyay, R Manekar, ... Proceedings of the IEEE conference on computer vision and pattern …, 2018 | 57 | 2018 |
| Design of optimal wavelet packet trees based on auditory perception criterion A Karmakar, A Kumar, RK Patney IEEE Signal Processing Letters 14 (4), 240-243, 2007 | 44 | 2007 |
| An improved multi-band spectral subtraction algorithm for enhancing speech in various noise environments N Upadhyay, A Karmakar Procedia Engineering 64, 312-321, 2013 | 32 | 2013 |
| A high-performance and area-efficient VLSI architecture for the PRESENT lightweight cipher JG Pandey, T Goel, A Karmakar 2018 31st international conference on VLSI design and 2018 17th …, 2018 | 28 | 2018 |
| A multiresolution model of auditory excitation pattern and its application to objective evaluation of perceived speech quality A Karmakar, A Kumar, RK Patney IEEE transactions on audio, speech, and language processing 14 (6), 1912-1923, 2006 | 27 | 2006 |
| Hardware architectures for PRESENT block cipher and their FPGA implementations JG Pandey, T Goel, A Karmakar IET Circuits, Devices & Systems 13 (7), 958-969, 2019 | 23 | 2019 |
| Smart surveillance system for real-time multi-person multi-camera tracking at the edge B Gaikwad, A Karmakar Journal of real-time image processing 18 (6), 1993-2007, 2021 | 22 | 2021 |
| CORDIC based implementation of Fast Fourier Transform P Choudhary, A Karmakar 2011 2nd International Conference on Computer and Communication Technology …, 2011 | 21 | 2011 |
| Design of an optimal two-channel orthogonal filterbank using semidefinite programming A Karmakar, A Kumar, RK Patney IEEE Signal Processing Letters 14 (10), 692-694, 2007 | 19 | 2007 |
| A novel architecture for FPGA implementation of Otsu's global automatic image thresholding algorithm JG Pandey, A Karmakar, C Shekhar, S Gurunarayanan 2014 27th International Conference on VLSI Design and 2014 13th …, 2014 | 18 | 2014 |
| An efficient VLSI architecture for PRESENT block cipher and its FPGA implementation JG Pandey, T Goel, A Karmakar VLSI Design and Test: 21st International Symposium, VDAT 2017, Roorkee …, 2017 | 17 | 2017 |
| Spectral subtractive-type algorithms for enhancement of noisy speech: an integrative review N Upadhyay, A Karmakar International Journal of Image, Graphics and Signal Processing 5 (11), 13, 2013 | 16 | 2013 |
| Platform-based extensible hardware-software video streaming module for a smart camera system JG Pandey, S Purushottam, A Karmakar, C Shekhar International Journal of Modeling and Optimization 2 (4), 482, 2012 | 16 | 2012 |
| The spectral subtractive-type algorithms for enhancing speech in noisy environments N Upadhyay, A Karmakar 2012 1st International Conference on Recent Advances in Information …, 2012 | 15 | 2012 |
| An FPGA-based fixed-point architecture for binary logarithmic computation JG Pandey, A Karmakar, C Shekhar, S Gurunarayanan 2013 IEEE Second International Conference on Image Information Processing …, 2013 | 14 | 2013 |
| End-to-end person re-identification: Real-time video surveillance over edge-cloud environment B Gaikwad, A Karmakar Computers and Electrical Engineering 99, 107824, 2022 | 13 | 2022 |
| Efficient integration of coprocessor in LEON3 processor pipeline for System-on-Chip design R Bansal, A Karmakar Microprocessors and Microsystems 51, 56-75, 2017 | 12 | 2017 |
| Platform-Based Design Approach for Embedded Vision Applications JG Pandey, A Karmakar, C Shekhar, S Gurunarayanan Journal of Image and Graphics 1 (1), 1-6, 2013 | 12 | 2013 |
| An RNS implementation of the elliptic curve cryptography for IoT security JG Pandey, C Mitharwal, A Karmakar 2019 First IEEE International Conference on Trust, Privacy and Security in …, 2019 | 10 | 2019 |
Jai Gopal Pandey, Ph.D.Senior Principal Scientist, CSIR– Central Electronics Engg. Research Insti (CEERI), Pilani, IndiaVerified email at ceeri.res.in
