| FabScalar: Composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template NK Choudhary, SV Wadhavkar, TA Shah, H Mayukh, J Gandhi, BH Dwiel, ... ACM SIGARCH Computer Architecture News 39 (3), 11-22, 2011 | 198 | 2011 |
| Fabscalar: Automating superscalar core design N Choudhary, S Wadhavkar, T Shah, H Mayukh, J Gandhi, B Dwiel, ... IEEE Micro 32 (3), 48-59, 2012 | 43 | 2012 |
| FabMem: A Multiported RAM and CAM Compiler for Superscalar Design Space Exploration. T Shah | 32 | 2010 |
| Fabscalar NK Choudhary, SV Wadhavkar, TA Shah, H Mayukh, J Gandhi, BH Dwiel, ... ACM SIGARCH Computer Architecture News 39 (3), 11-22, 2011 | 23 | 2011 |
| Zeronvs: Zero-shot 360-degree view synthesis from a single real image K Sargent, Z Li, T Shah, C Herrmann, HX Yu, Y Zhang, ER Chan, D Lagun, ... arXiv preprint arXiv:2310.17994, 2023 | 19 | 2023 |
| Preface: A data-driven volumetric prior for few-shot ultra high-resolution face synthesis MC Bühler, K Sarkar, T Shah, G Li, D Wang, L Helminger, ... Proceedings of the IEEE/CVF International Conference on Computer Vision …, 2023 | 8 | 2023 |
| TEGLO: High Fidelity Canonical Texture Mapping from Single-View Images V Vinod, T Shah, D Lagun arXiv preprint arXiv:2303.13743, 2023 | 2 | 2023 |
| FabScalar ER N Choudhary, Salil Wadhavkar, Tanmay Shah, Sandeep Navada, H Najaf-Abadi WARP, 2009 | | 2009 |
| 1. FabScalar: Motivation and Concept NK Choudhary, SV Wadhavkar, TA Shah, SS Navada, HH Najaf-abadi, ... | | |
| DESIGN AND LAYOUT OF A 48 BIT MULTI-PORT SRAM T Shah, R Mallya, R Rajasekharan | | |
Hashem Hashemi Najaf-abadiAMDGeverifieerd e-mailadres voor ece.ncsu.edu
