John Jose
John Jose
Assistant Professor, Department of Computer Science & Engineering, IIT Guwahati
Verified email at iitg.ac.in - Homepage
Title
Cited by
Cited by
Year
Study and analysis of various task scheduling algorithms in the cloud computing environment
T Mathew, KC Sekaran, J Jose
2014 International conference on advances in computing, communications andá…, 2014
1672014
DeBAR: Deflection based adaptive router with minimal buffering
J Jose, B Nayak, K Kumar, M Mutyam
2013 Design, Automation & Test in Europe Conference & Exhibition (DATEá…, 2013
432013
Minimally buffered single-cycle deflection router
GR Jonna, J Jose, R Radhakrishnan, M Mutyam
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-4, 2014
162014
Cost effective routing techniques in 2D mesh NoC using on-chip transmission lines
D Deb, J Jose, S Das, HK Kapoor
Journal of Parallel and Distributed Computing 123, 118-129, 2019
152019
SLIDER: smart late injection deflection router for mesh NoCs
B Nayak, J Jose, M Mutyam
2013 IEEE 31st International Conference on Computer Design (ICCD), 377-383, 2013
112013
TRACKER: A low overhead adaptive NoC router with load balancing selection strategy
J Jose, KV Mahathi, JS Shankar, M Mutyam
Proceedings of the International Conference on Computer-Aided Design, 564-568, 2012
112012
BOFAR: buffer occupancy factor based adaptive router for mesh NoCs
J Jose, JS Shankar, KV Mahathi, DK Kumar, M Mutyam
Proceedings of the 4th International Workshop on Network on Chipá…, 2011
112011
Critical packet prioritisation by slack-aware re-routing in on-chip networks
A Das, S Babu, J Jose, S Jose, M Palesi
2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 1-8, 2018
82018
Analyzing networks-on-chip based deep neural networks
G Ascia, V Catania, S Monteleone, M Palesi, D Patti, J Jose
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chipá…, 2019
52019
Improving energy consumption of NoC based architectures through approximate communication
G Ascia, V Catania, S Monteleone, M Palesi, D Patti, J Jose
2018 7th Mediterranean Conference on Embedded Computing (MECO), 1-4, 2018
52018
Implementation and analysis of hotspot mitigation in mesh nocs by cost-effective deflection routing technique
RSR Raj, A Das, J Jose
2017 IFIP/IEEE International Conference on Very Large Scale Integrationá…, 2017
52017
HiPAD: High Performance Adaptive Deflection Router for On-Chip Mesh Networks
SZ Sleeba, J Jose, MG Mini
2015 Fifth International Conference on Advances in Computing andá…, 2015
52015
Smart port allocation for adaptive NoC routers
R James, J Jose, JK Antony
2015 28th International Conference on VLSI Design, 475-480, 2015
52015
WeDBless: weighted deflection bufferless router for mesh NoCs
SZ Sleeba, J Jose, M MG
Proceedings of the 24th edition of the great lakes symposium on VLSI, 77-78, 2014
52014
SECTAR: Secure NoC using Trojan Aware Routing
R Manju, A Das, J Jose, P Mishra
2020 14th IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 1-8, 2020
42020
Exploiting data resilience in wireless network-on-chip architectures
G Ascia, V Catania, S Monteleone, M Palesi, D Patti, J Jose, VM Salerno
ACM Journal on Emerging Technologies in Computing Systems (JETC) 16 (2), 1-27, 2020
42020
Approximate wireless networks-on-chip
G Ascia, V Catania, S Monteleone, M Palesi, D Patti, J Jose
2018 Conference on Design of Circuits and Integrated Systems (DCIS), 1-6, 2018
42018
An adaptive deflection router with dual injection and ejection units for mesh NoCs
J Jose, A Das
2018 31st International Conference on VLSI Design and 2018 17thá…, 2018
42018
Reducing off-chip miss penalty by exploiting underutilised on-chip router buffers
A Das, A Kumar, J Jose
2020 IEEE 38th International Conference on Computer Design (ICCD), 230-238, 2020
32020
Exploiting on-chip routers to store dirty cache blocks in tiled chip multi-processors
A Das, A Kumar, J Jose, M Palesi
2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 147-152, 2020
32020
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Articles 1–20