| Margin-maximization in binarized neural networks for optimizing bit error tolerance S Buschjäger, JJ Chen, KH Chen, M Günzel, C Hakert, K Morik, R Novkin, ... 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 673-678, 2021 | 25 | 2021 |
| Fefet-based binarized neural networks under temperature-dependent bit errors M Yayla, S Buschjäger, A Gupta, JJ Chen, J Henkel, K Morik, KH Chen, ... IEEE Transactions on Computers 71 (7), 1681-1695, 2021 | 18 | 2021 |
| Software-based memory analysis environments for in-memory wear-leveling C Hakert, KH Chen, M Yayla, G Von Der Brüggen, S Blömeke, JJ Chen 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 651-658, 2020 | 15 | 2020 |
| Binarized snns: Efficient and error-resilient spiking neural networks through binarization ML Wei, M Yayla, SY Ho, JJ Chen, CL Yang, H Amrouch 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021 | 14 | 2021 |
| Reliable binarized neural networks on unreliable beyond von-neumann architecture M Yayla, S Thomann, S Buschjäger, K Morik, JJ Chen, H Amrouch IEEE Transactions on Circuits and Systems I: Regular Papers 69 (6), 2516-2528, 2022 | 13 | 2022 |
| Nanoparticle classification using frequency domain analysis on resource-limited platforms M Yayla, A Toma, KH Chen, JE Lenssen, V Shpacovitch, R Hergenröder, ... Sensors 19 (19), 4138, 2019 | 12 | 2019 |
| Memory-efficient training of binarized neural networks on the edge M Yayla, JJ Chen Proceedings of the 59th ACM/IEEE Design Automation Conference, 661-666, 2022 | 9 | 2022 |
| Fault tolerance on control applications: empirical investigations of impacts from incorrect calculations M Yayla, KH Chen, JJ Chen 2018 4th International Workshop on Emerging Ideas and Trends in the …, 2018 | 8 | 2018 |
| Towards explainable bit error tolerance of resistive ram-based binarized neural networks S Buschjäger, JJ Chen, KH Chen, M Günzel, C Hakert, K Morik, R Novkin, ... arXiv preprint arXiv:2002.00909, 2020 | 6 | 2020 |
| TREAM: A Tool for Evaluating Error Resilience of Tree-Based Models Using Approximate Memory M Yayla, Z Valipour Dehnoo, M Masoudinejad, JJ Chen International Conference on Embedded Computer Systems, 61-73, 2022 | 5 | 2022 |
| Bit error tolerance metrics for binarized neural networks S Buschjäger, JJ Chen, KH Chen, M Günzel, K Morik, R Novkin, L Pfahler, ... arXiv preprint arXiv:2102.01344, 2021 | 4 | 2021 |
| Stack usage analysis for efficient wear leveling in non-volatile main memory systems C Hakert, M Yayla, KH Chen, G von der Brüggen, JJ Chen, S Buschjäger, ... 2019 ACM/IEEE 1st Workshop on Machine Learning for CAD (MLCAD), 1-6, 2019 | 4 | 2019 |
| Impact of Non-Volatile Memory Cells on Spiking Neural Network Annealing Machine With In-Situ Synapse Processing ML Wei, M Yayla, SY Ho, JJ Chen, H Amrouch, CL Yang IEEE Transactions on Circuits and Systems I: Regular Papers, 2023 | 3 | 2023 |
| DAEBI: A Tool for Data Flow and Architecture Explorations of Binary Neural Network Accelerators M Yayla, C Latotzke, R Huber, S Iskif, T Gemmeke, JJ Chen International Conference on Embedded Computer Systems, 107-122, 2023 | 3 | 2023 |
| Robust and Tiny Binary Neural Networks using Gradient-based Explainability Methods M Sabih, M Yayla, F Hannig, J Teich, JJ Chen Proceedings of the 3rd Workshop on Machine Learning and Systems, 87-93, 2023 | 3 | 2023 |
| HW/SW codesign for approximation-aware binary neural networks A Dave, F Frustaci, F Spagnolo, M Yayla, JJ Chen, H Amrouch IEEE Journal on Emerging and Selected Topics in Circuits and Systems 13 (1 …, 2023 | 3 | 2023 |
| Brain-inspired computing: Adventure from beyond CMOS technologies to beyond von Neumann architectures ICCAD special session paper H Amrouch, JJ Chen, K Roy, Y Xie, I Chakraborty, W Huangfu, L Liang, ... 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021 | 3 | 2021 |
| Universal Approximation Theorems of Fully Connected Binarized Neural Networks M Yayla, M Günzel, B Ramosaj, JJ Chen arXiv preprint arXiv:2102.02631, 2021 | 3 | 2021 |
| Unlocking Efficiency in BNNs: Global by Local Thresholding for Analog-based HW Accelerators M Yayla, F Frustaci, F Spagnolo, JJ Chen, H Amrouch IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2023 | 2 | 2023 |
| HW/SW Codesign for Robust and Efficient Binarized SNNs by Capacitor Minimization M Yayla, S Thomann, ML Wei, CL Yang, JJ Chen, H Amrouch arXiv preprint arXiv:2309.02111, 2023 | 2 | 2023 |
