Computing floating-point square roots via bivariate polynomial evaluation CP Jeannerod, H Knochel, C Monat, G Revy IEEE Transactions on Computers 60 (2), 214-227, 2010 | 30 | 2010 |
DSP-MCU processor optimization for portable applications BD de Dinechin, C Monat, P Blouet, C Bertin Microelectronic engineering 54 (1-2), 123-132, 2000 | 16 | 2000 |
Faster floating-point square root for integer processors CP Jeannerod, H Knochel, C Monat, G Revy 2007 International Symposium on Industrial Embedded Systems, 324-327, 2007 | 15 | 2007 |
Techniques and tools for implementing IEEE 754 floating-point arithmetic on VLIW integer processors CP Jeannerod, C Mouilleron, JM Muller, G Revy, C Bertin, J Jourdan-Lu, ... Proceedings of the 4th International Workshop on Parallel and Symbolic …, 2010 | 14 | 2010 |
Division by Constant for the ST100 DSP Microprocessor JM Muller, A Tisserand, B de Dinechin, C Monat 17th IEEE Symposium on Computer Arithmetic (ARITH'05), 124-130, 2005 | 12 | 2005 |
A floating-point library for integer processors C Bertin, N Brisebarre, BD de Dinechin, CP Jeannerod, C Monat, ... Advanced Signal Processing Algorithms, Architectures, and Implementations …, 2004 | 12 | 2004 |
A new binary floating-point division algorithm and its software implementation on the ST231 processor CP Jeannerod, H Knochel, C Monat, G Revy, G Villard 2009 19th IEEE Symposium on Computer Arithmetic, 95-103, 2009 | 9 | 2009 |
More accurate complex multiplication for embedded processors CP Jeannerod, C Monat, L Thévenoux 2017 12th IEEE International Symposium on Industrial Embedded Systems (SIES …, 2017 | 4 | 2017 |
Parallel execution of the saturated reductions BD de Dinechin, C Monat, F Rastello 2001 IEEE Workshop on Signal Processing Systems. SiPS 2001. Design and …, 2001 | 4 | 2001 |
Non-generic floating-point software support for embedded media processing CP Jeannerod, J Jourdan-Lu, C Monat 7th IEEE International Symposium on Industrial Embedded Systems (SIES'12 …, 2012 | 3 | 2012 |
Division by Constant for the ST100 DSP Microprocessor B de Dinechin, C Monat, JM MULLER, A Tisserand Proc. 17th IEEE Symposium on Computer Arithmetic (ARITH-17), 2005 | 2 | 2005 |
How to Square Floats Accurately and Efficiently on the ST231 Integer Processor CP Jeannerod, J Jourdan-Lu, C Monat, G Revy 20th IEEE Symposium on Computer Arithmetic (ARITH), 0 | 2* | |
Bringing fast floating-point arithmetic into embedded integer processors C Bertin, CP Jeannerod, C Monat HiPEAC Info, 11-12, 2010 | | 2010 |
Parallel execution of the saturated reductions B Dupont de Dinechin, C Monat, F Rastello | | 2001 |
How to square floats accurately and efficiently on the ST231 integer processor CP Jeannerod, J Jourdan-Lu, C Monat, G Revy | | |
More accurate complex multiplication: GCC setup and AArch64 performance study CP Jeannerod, C Monat, L Thévenoux | | |