Gabriela Nicolescu
Gabriela Nicolescu
Professor Computer Engineering, Ecole Polytechnique Montréal
Geverifieerd e-mailadres voor polymtl.ca
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Component-based design approach for multicore SoCs
W Cesario, A Baghdadi, L Gauthier, D Lyonnard, G Nicolescu, Y Paviot, ...
Proceedings of the 39th annual Design Automation Conference, 789-794, 2002
2352002
System level assessment of an optical NoC in an MPSoC platform
M Briere, B Girodias, Y Bouchebaba, G Nicolescu, F Mieyeville, F Gaffiot, ...
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
1932007
Multiprocessor SoC platforms: a component-based design approach
WO Cesário, D Lyonnard, G Nicolescu, Y Paviot, S Yoo, AA Jerraya, ...
IEEE Design & Test of Computers 19 (6), 52-63, 2002
1792002
Model-based design for embedded systems
G Nicolescu, PJ Mosterman
Crc Press, 2018
1412018
Optical ring network-on-chip (ORNoC): Architecture and design methodology
S Le Beux, J Trajkovic, I O'Connor, G Nicolescu, G Bois, P Paulin
2011 Design, Automation & Test in Europe, 1-6, 2011
1212011
Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia
PG Paulin, C Pilkington, M Langevin, E Bensoudane, D Lyonnard, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 14 (7), 667-680, 2006
1052006
Automatic generation of fast timed simulation models for operating systems in SoC design
S Yoo, G Nicolescu, L Gauthier, AA Jerraya
Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002
952002
A SystemC/Simulink co-simulation framework for continuous/discrete-events simulation
F Bouchhima, M Briere, G Nicolescu, M Abid, EM Aboulhamid
2006 IEEE International Behavioral Modeling and Simulation Workshop, 1-6, 2006
892006
Parallel programming models for a multi-processor SoC platform applied to high-speed traffic management
PG Paulin, C Pilkington, M Langevin, E Bensoudane, G Nicolescu
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware …, 2004
852004
Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures
P Gerin, S Yoo, G Nicolescu, AA Jerraya
Proceedings of the 2001 Asia and South Pacific Design Automation Conference …, 2001
852001
A generic wrapper architecture for multi-processor SoC cosimulation and design
S Yoo, G Nicolescu, D Lyonnard, A Baghdadi, AA Jerraya
Proceedings of the ninth international symposium on Hardware/software …, 2001
702001
Colif: A design representation for application-specific multiprocessor SOCs
WO Cesário, G Nicolescu, L Gauthier, D Lyonnard, AA Jerraya
IEEE Design & Test of Computers 18 (5), 8-20, 2001
632001
Reliable performance analysis of a multicore multithreaded system-on-chip
S Schliecker, M Negrean, G Nicolescu, P Paulin, R Ernst
Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware …, 2008
562008
Mixed-level cosimulation for fine gradual refinement of communication in SoC design
G Nicolescu, S Yoo, AA Jerraya
Proceedings Design, Automation and Test in Europe. Conference and Exhibition …, 2001
552001
Chameleon: Channel efficient optical network-on-chip
S Le Beux, H Li, I O'Connor, K Cheshmi, X Liu, J Trajkovic, G Nicolescu
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
502014
Validation in a component-based design flow for multicore SoCs
G Nicolescu, S Yoo, A Bouchhima, AA Jerraya
Proceedings of the 15th international symposium on System Synthesis, 162-167, 2002
492002
Reduction methods for adapting optical network on chip topologies to specific routing applications
I O’Connor, F Mieyeville, F Gaffiot, A Scandurra, G Nicolescu
Proceedings of DCIS, 2008
462008
Soft-error classification and impact analysis on real-time operating systems
N Ignat, B Nicolescu, Y Savaria, G Nicolescu
Proceedings of the Design Automation & Test in Europe Conference 1, 6 pp., 2006
402006
Thermal aware design method for vcsel-based on-chip optical interconnect
H Li, A Fourmigue, S Le Beux, X Letartre, I O'Connor, G Nicolescu
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015
322015
Layout guidelines for 3D architectures including optical ring network-on-chip (ORNoC)
S Le Beux, J Trajkovic, I O'Connor, G Nicolescu
2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 242-247, 2011
322011
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