| Coco:{Co-Design} and {Co-Verification} of masked software implementations on {CPUs} B Gigerl, V Hadzic, R Primas, S Mangard, R Bloem 30th USENIX Security Symposium (USENIX Security 21), 1469-1468, 2021 | 59 | 2021 |
| Secure and efficient software masking on superscalar pipelined processors B Gigerl, R Primas, S Mangard Advances in Cryptology–ASIACRYPT 2021: 27th International Conference on the …, 2021 | 13 | 2021 |
| Riding the waves towards generic single-cycle masking in hardware R Nagpal, B Gigerl, R Primas, S Mangard Cryptology ePrint Archive, 2022 | 11 | 2022 |
| Formal verification of arithmetic masking in hardware and software B Gigerl, R Primas, S Mangard International Conference on Applied Cryptography and Network Security, 3-32, 2023 | 8 | 2023 |
| Power contracts: Provably complete power leakage models for processors R Bloem, B Gigerl, M Gourjon, V Hadzic, S Mangard, R Primas Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications …, 2022 | 5 | 2022 |
| Security Aspects of Masking on FPGAs B Gigerl, K Pretterhofer, S Mangard 2024 IEEE International Symposium on Hardware Oriented Security and Trust …, 2024 | | 2024 |
| Secure Context Switching of Masked Software Implementations B Gigerl, R Primas, S Mangard Proceedings of the 2023 ACM Asia Conference on Computer and Communications …, 2023 | | 2023 |
| Smooth Passage with the Guards: Second-Order Hardware Masking of the AES with Low Randomness and Low Latency B Gigerl, F Klug, S Mangard, F Mendel, R Primas IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES) 2024, 2023 | | 2023 |
| Compress: Reducing Area and Latency of Masked Pipelined Circuits G Cassiers, B Gigerl, S Mangard, C Momin, R Nagpal Cryptology ePrint Archive, 2023 | | 2023 |
| Efficient Second-Order Masked Software Implementations of Ascon in Theory and Practice B Gigerl, F Mendel, M Schläffer, R Primas | | |
