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Andreas Zankl
Andreas Zankl
Security Researcher, Fraunhofer AISEC
Geverifieerd e-mailadres voor aisec.fraunhofer.de
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DATA – Differential Address Trace Analysis: Finding Address-based Side-Channels in Binaries
S Weiser, A Zankl, R Spreitzer, K Miller, S Mangard, G Sigl
27th USENIX Security Symposium (USENIX Security 18), 2018
792018
{AutoLock}: Why cache attacks on {ARM} are harder than you think
M Green, L Rodrigues-Lima, A Zankl, G Irazoqui, J Heyszl, T Eisenbarth
26th USENIX Security Symposium (USENIX Security 17), 1075-1091, 2017
762017
PerfWeb: How to violate web privacy with hardware performance events
B Gulmezoglu, A Zankl, T Eisenbarth, B Sunar
Computer Security–ESORICS 2017: 22nd European Symposium on Research in …, 2017
542017
How to break secure boot on fpga socs through malicious hardware
N Jacob, J Heyszl, A Zankl, C Rolfes, G Sigl
Cryptographic Hardware and Embedded Systems–CHES 2017: 19th International …, 2017
492017
Towards protected MPSoC communication for information protection against a malicious NoC
J Sepúlveda, A Zankl, D Flórez, G Sigl
Procedia computer science 108, 1103-1112, 2017
432017
Undermining user privacy on mobile devices using AI
B Gulmezoglu, A Zankl, MC Tol, S Islam, T Eisenbarth, B Sunar
Proceedings of the 2019 ACM Asia Conference on Computer and Communications …, 2019
302019
Breaking trustzone memory isolation through malicious hardware on a modern fpga-soc
M Gross, N Jacob, A Zankl, G Sigl
Proceedings of the 3rd ACM Workshop on Attacks and Solutions in Hardware …, 2019
212019
Exploiting bus communication to improve cache attacks on systems-on-chips
J Sepulveda, M Gross, A Zankl, G Sigl
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 284-289, 2017
182017
Automated detection of instruction cache leaks in modular exponentiation software
A Zankl, J Heyszl, G Sigl
Smart Card Research and Advanced Applications: 15th International Conference …, 2017
182017
Earthquake—A NoC-based optimized differential cache-collision attack for MPSoCs
C Reinbrecht, B Forlin, A Zankl, J Sepúlveda
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 648-653, 2018
172018
Side-channel attacks in the Internet of Things: threats and challenges
A Zankl, H Seuschek, G Irazoqui, B Gulmezoglu
Research Anthology on Artificial Intelligence Applications in Security, 2058 …, 2021
162021
Compromising FPGA SoCs using malicious hardware blocks
N Jacob, C Rolfes, A Zankl, J Heyszl, G Sigl
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
152017
Cache attacks and countermeasures for NTRUEncrypt on MPSoCs: post-quantum resistance for the IoT
J Sepulveda, A Zankl, O Mischke
2017 30th IEEE International System-on-Chip Conference (SOCC), 120-125, 2017
112017
Breaking TrustZone memory isolation and secure boot through malicious hardware on a modern FPGA-SoC
M Gross, N Jacob, A Zankl, G Sigl
Journal of Cryptographic Engineering 12 (2), 181-196, 2022
102022
Beyond cache attacks: Exploiting the bus-based communication structure for powerful on-chip microarchitectural attacks
J Sepúlveda, M Gross, A Zankl, G Sigl
ACM Transactions on Embedded Computing Systems (TECS) 20 (2), 1-23, 2021
102021
Automated detection of instruction cache leaks in rsa software implementations
A Zankl, J Heyszl, G Sigl
Smart Card Research and Advanced Applications: 15th International Conference …, 2016
52016
Towards efficient evaluation of a time-driven cache attack on modern processors
A Zankl, K Miller, J Heyszl, G Sigl
Computer Security–ESORICS 2016: 21st European Symposium on Research in …, 2016
52016
Minimizing the costs of side-channel analysis resistance evaluations in early design steps
T Korak, T Plos, A Zankl
2013 International Conference on Availability, Reliability and Security, 169-177, 2013
42013
Towards trace-driven cache attacks on Systems-on-Chips—exploiting bus communication
J Sepulveda, M Gross, A Zankl, G Sigl
2017 12th International Symposium on Reconfigurable Communication-centric …, 2017
12017
Impeccable Keccak: Towards Fault Resilient SPHINCS+ Implementations
I Gavrilan, F Oberhansl, A Wagner, E Strieder, A Zankl
IACR Transactions on Cryptographic Hardware and Embedded Systems 2024 (2 …, 2024
2024
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Artikelen 1–20