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Reza Hojabr
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SkippyNN: An embedded stochastic-computing accelerator for convolutional neural networks
R Hojabr, K Givaki, SMR Tayaranian, P Esfahanian, A Khonsari, ...
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
522019
Power-efficient accelerator design for neural networks using computation reuse
A Yasoubi, R Hojabr, M Modarressi
IEEE computer architecture letters 16 (1), 72-75, 2016
422016
μir-an intermediate representation for transforming and optimizing the microarchitecture of application accelerators
A Sharifian, R Hojabr, N Rahimi, S Liu, A Guha, T Nowatzki, A Shriraman
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
372019
Customizing clos network-on-chip for neural networks
R Hojabr, M Modarressi, M Daneshtalab, A Yasoubi, A Khonsari
IEEE Transactions on Computers 66 (11), 1865-1877, 2017
332017
SPAGHETTI: Streaming Accelerators for Highly Sparse GEMM on FPGAs
R Hojabr, A Sedaghati, A Sharifian, A Khonsari, A Shriraman
2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021
302021
On the resilience of deep learning for reduced-voltage FPGAs
K Givaki, B Salami, R Hojabr, SMR Tayaranian, A Khonsari, D Rahmati, ...
2020 28th Euromicro International Conference on Parallel, Distributed and …, 2020
192020
Using residue number systems to accelerate deterministic bit-stream multiplication
K Givaki, R Hojabr, MH Najafi, A Khonsari, MH Gholamrezayi, S Gorgin, ...
2019 IEEE 30th International Conference on Application-specific Systems …, 2019
92019
CuPAN–high throughput on-chip interconnection for neural networks
A Yasoubi, R Hojabr, H Takshi, M Modarressi, M Daneshtalab
Neural Information Processing: 22nd International Conference, ICONIP 2015 …, 2015
92015
X-cache: A modular architecture for domain-specific caches
A Sedaghati, M Hakimi, R Hojabr, A Shriraman
Proceedings of the 49th Annual International Symposium on Computer …, 2022
62022
Real-time formal verification of autonomous systems with an fpga
M Bui, M Lu, R Hojabr, M Chen, A Shriraman
arXiv preprint arXiv:2012.04011, 2020
62020
Embedded stochastic-computing accelerator architecture and method for convolutional neural networks
DR Mohammadhassan Najafi, Seved Reza Hojabrossadati, Kamyar Givaki, SM Reza ...
US Patent App. 17/159,347, 2021
5*2021
Real-time Hamilton-Jacobi reachability analysis of autonomous system with an fpga
M Bui, M Lu, R Hojabr, M Chen, A Shriraman
2021 IEEE/RSJ International Conference on Intelligent Robots and Systems …, 2021
32021
High-performance deterministic stochastic computing using residue number system
K Givaki, R Hojabr, MH Gholamrezaei, A Khonsari, S Gorgin, D Rahmati, ...
IEEE Design & Test 38 (6), 60-68, 2021
32021
TaxoNN: a Light-Weight Accelerator for Deep Neural Network Training
R Hojabr, K Givaki, K Pourahmadi, P Nooralinejad, A Khonsari, ...
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020
32020
X-Layer: Building Composable Pipelined Dataflows for Low-Rank Convolutions
N Vedula, R Hojabr, A Khonsari, A Shriraman
2021 30th International Conference on Parallel Architectures and Compilation …, 2021
22021
Mu-Grind: A Framework for Dynamically Instrumenting HLS-Generated RTL
P Vahdatniya, A Sharifian, R Hojabr, A Shriraman
Proceedings of the International Conference on Parallel Architectures and …, 2022
12022
TAXONN: A LIGHT-WEIGHT ACCELERATOR FOR TRAINING DEEP NEURAL NETWORKS ON THE EDGE
M Najaf, R Hojabr, K Givaki, K Pourahmadi, P Nooralinejad, A Khonsari, ...
US Patent App. 17/961,396, 2024
2024
Method and architecture for accelerating deterministic stochastic computing using residue number system
DR Mohammadhassan Najafi, Kamyar Givaki, Seyed Reza Hojabrossadati, MH ...
US Patent App. 17/166,378, 2021
2021
High Performance Interconnection Networks for Neural Network Accelerators
R Hojabr
School of ECE, University of Tehran, 2021
2021
Feedforward neural networks on massively parallel architectures
R Hojabr, A Khonsari, M Modarressi, M Daneshtalab
Institution of Engineering and Technology, 2020
2020
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