Jordi Suñé
Jordi Suñé
Professor of Electronics, IEEE Fellow, Universitat Autònoma de Barcelona
Verified email at - Homepage
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Cited by
Recommended methods to study resistive switching devices
M Lanza, HSP Wong, E Pop, D Ielmini, D Strukov, BC Regan, L Larcher, ...
Advanced Electronic Materials 5 (1), 1800143, 2019
Continuous analytic IV model for surrounding-gate MOSFETs
D Jimenez, B Iniguez, J Sune, LF Marsal, J Pallares, J Roig, D Flores
IEEE Electron Device Letters 25 (8), 571-573, 2004
On the breakdown statistics of very thin SiO2 films
J Sune, I Placencia, N Barniol, E Farrés, F Martin, X Aymerich
Thin solid films 185 (2), 347-362, 1990
New physics-based analytic approach to the thin-oxide breakdown statistics
J Suñé
IEEE Electron Device Letters 22 (6), 296-298, 2001
Reliability wearout mechanisms in advanced CMOS technologies
AW Strong, EY Wu, RP Vollertsen, J Sune, G La Rosa, TD Sullivan, ...
John Wiley & Sons, 2009
Quantum-size effects in hafnium-oxide resistive switching
S Long, X Lian, C Cagli, X Cartoixa, R Rurali, E Miranda, D Jiménez, ...
Applied Physics Letters 102 (18), 183505, 2013
Power-law voltage acceleration: A key element for ultra-thin gate oxide reliability
EY Wu, J Suné
Microelectronics reliability 45 (12), 1809-1834, 2005
Interplay of voltage and temperature acceleration of oxide breakdown for ultra-thin gate oxides
E Wu, J Sune, W Lai, E Nowak, J McKenna, A Vayshenker, D Harmon
Solid-State Electronics 46 (11), 1787-1798, 2002
Voltage and power-controlled regimes in the progressive unipolar RESET transition of HfO2-based RRAM
S Long, L Perniola, C Cagli, J Buckley, X Lian, E Miranda, F Pan, M Liu, ...
Scientific reports 3 (1), 1-8, 2013
Modeling of nanoscale gate-all-around MOSFETs
D Jimenez, JJ Saenz, B Iniguez, J Sune, LF Marsal, J Pallares
IEEE Electron device letters 25 (5), 314-316, 2004
Electron transport through broken down ultra-thin SiO2 layers in MOS devices
E Miranda, J Sune
Microelectronics Reliability 44 (1), 1-23, 2004
A model for the set statistics of RRAM inspired in the percolation model of oxide breakdown
S Long, X Lian, C Cagli, L Perniola, E Miranda, M Liu, J Suñé
IEEE electron device letters 34 (8), 999-1001, 2013
Quantum-mechanical modeling of accumulation layers in MOS structure
J Sune, P Olivo, B Ricco
IEEE Transactions on Electron Devices 39 (7), 1732-1739, 1992
Soft breakdown conduction in ultrathin (3-5 nm) gate dielectrics
E Miranda, J Suñé, R Rodriguez, M Nafria, X Aymerich, L Fonseca, ...
IEEE Transactions on Electron Devices 47 (1), 82-89, 2000
Analytic modeling of leakage current through multiple breakdown paths in SiO/sub 2/films
E Miranda, J Suñé
2001 IEEE International Reliability Physics Symposium Proceedings. 39th …, 2001
Experimental evidence of T/sub BD/power-law for voltage dependence of oxide breakdown in ultrathin gate oxides
EY Wu, A Vayshenker, E Nowak, J Sune, RP Vollertsen, W Lai, D Harmon
IEEE Transactions on Electron Devices 49 (12), 2244-2253, 2002
Cycle-to-Cycle Intrinsic RESET Statistics in -Based Unipolar RRAM Devices
S Long, X Lian, T Ye, C Cagli, L Perniola, E Miranda, M Liu, J Sune
IEEE electron device letters 34 (5), 623-625, 2013
Exploratory Observations of Post‐breakdown Conduction in Polycrystalline‐silicon and Metal‐gated Thin‐oxide Metal‐oxide‐semiconductor Capacitors
M Nafria, J Suñé, X Aymerich
Journal of Applied Physics 73 (1), 205-215, 1993
Self‐consistent solution of the Poisson and Schrödinger equations in accumulated semiconductor‐insulator interfaces
J Sune, P Olivo, B Ricco
Journal of applied physics 70 (1), 337-345, 1991
Unified compact model for the ballistic quantum wire and quantum well metal-oxide-semiconductor field-effect-transistor
D Jiménez, JJ Sáenz, B Inıquez, J Suñé, LF Marsal, J Pallarès
Journal of Applied Physics 94 (2), 1061-1068, 2003
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