Saad Godil
Saad Godil
Director of Applied Deep Learning Research, NVIDIA
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Cited by
Cited by
Accelerating chip design with machine learning
B Khailany, H Ren, S Dai, S Godil, B Keller, R Kirby, A Klinefelter, ...
IEEE Micro 40 (6), 23-32, 2020
Improving SAT solver heuristics with graph networks and reinforcement learning
V Kurin, S Godil, S Whiteson, B Catanzaro
Congestionnet: Routing congestion prediction using deep graph neural networks
R Kirby, S Godil, R Roy, B Catanzaro
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration …, 2019
Can Q-learning with graph networks learn a generalizable branching heuristic for a SAT solver?
V Kurin, S Godil, S Whiteson, B Catanzaro
Advances in Neural Information Processing Systems 33, 9608-9621, 2020
Deep predictive coverage collection
R Roy, C Duvedi, S Godil, M Williams
Proceedings of the design and verification conference and exhibition US (DVCon), 2018
Utilizing Assertion Synthesis to Achieve an Automated Assertion-Based Verification Methodology for Complex Graphics Chip Designs
P Chatterjee, S Godil, P Nelson, Y Lu
The 47th Design Automation Conference, User Track, June 2010, 2010
Deep Stalling using a Coverage Driven Genetic Algorithm Framework
S Dhodhi, D Chatterjee, E Hill, S Godil
2021 IEEE 39th VLSI Test Symposium (VTS), 1-4, 2021
Prefixrl: Optimization of parallel prefix circuits using deep reinforcement learning
R Roy, J Raiman, N Kant, I Elkin, R Kirby, M Siu, S Oberman, S Godil, ...
2021 58th ACM/IEEE Design Automation Conference (DAC), 853-858, 2021
Optimizing VLSI Implementation with Reinforcement Learning-ICCAD Special Session Paper
H Ren, S Godil, B Khailany, R Kirby, H Liao, S Nath, J Raiman, R Roy
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-6, 2021
Guiding Global Placement With Reinforcement Learning
R Kirby, K Nottingham, R Roy, S Godil, B Catanzaro
arXiv preprint arXiv:2109.02631, 2021
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