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Field-Effect Transistors With Graphene/Metal Heterocontacts Y Du, L Yang, J Zhang, H Liu, K Majumdar, PD Kirsch, DY Peide IEEE electron device letters 35 (5), 599-601, 2014 | 173 | 2014 |
Directed self-assembly of block copolymers for 7 nanometre FinFET technology and beyond CC Liu, E Franke, Y Mignot, R Xie, CW Yeung, J Zhang, C Chi, C Zhang, ... Nature Electronics 1 (10), 562-569, 2018 | 104 | 2018 |
Heteroepitaxy of La2O3 and La2–xYxO3 on GaAs (111)A by Atomic Layer Deposition: Achieving Low Interface Trap Density X Wang, L Dong, J Zhang, Y Liu, PD Ye, RG Gordon Nano letters 13 (2), 594-599, 2013 | 98 | 2013 |
Channel geometry impact and narrow sheet effect of stacked nanosheet CW Yeung, J Zhang, R Chao, O Kwon, R Vega, G Tsutsui, X Miao, ... 2018 IEEE international electron devices meeting (IEDM), 28.6. 1-28.6. 4, 2018 | 78 | 2018 |
A Novel Dry Selective Etch of SiGe for the Enablement of High Performance Logic Stacked Gate-All-Around NanoSheet Devices IEEE International Electron Devices Meeting (IEDM), pp. 11.4.1-11.4.4, 2019 | 71 | 2019 |
Full bottom dielectric isolation to enable stacked nanosheet transistor for low power and high performance applications J Zhang, J Frougier, A Greene, X Miao, L Yu, R Vega, P Montanini, ... 2019 IEEE International Electron Devices Meeting (IEDM), 11.6. 1-11.6. 4, 2019 | 67 | 2019 |
High-k metal gate fundamental learning and multi-Vt options for stacked nanosheet gate-all-around transistor J Zhang, T Ando, CW Yeung, M Wang, O Kwon, R Galatage, R Chao, ... 2017 IEEE International Electron Devices Meeting (IEDM), 22.1. 1-22.1. 4, 2017 | 60 | 2017 |
Air spacer for 10nm FinFET CMOS and beyond K Cheng, C Park, C Yeung, S Nguyen, J Zhang, X Miao, M Wang, ... 2016 IEEE International Electron Devices Meeting (IEDM), 17.1. 1-17.1. 4, 2016 | 53 | 2016 |
Vertically stacked nFET and pFET with dual work function A Reznicek, T Ando, J Zhang, CH Lee, P Hashemi US Patent 10,546,925, 2020 | 45 | 2020 |
Low-frequency noise and random telegraph noise on near-ballistic III-V MOSFETs M Si, NJ Conrad, S Shin, J Gu, J Zhang, MA Alam, DY Peide IEEE Transactions on Electron Devices 62 (11), 3508-3515, 2015 | 44 | 2015 |
First experimental demonstration of Ge 3D FinFET CMOS circuits H Wu, W Luo, H Zhou, M Si, J Zhang, DY Peide 2015 Symposium on VLSI Technology (VLSI Technology), T58-T59, 2015 | 41 | 2015 |
Full air-gap spacers for gate-all-around nanosheet field effect transistors T Ando, P Hashemi, CH Lee, A Reznicek, J Zhang US Patent 10,553,696, 2020 | 40 | 2020 |
Formation of self-limited inner spacer for gate-all-around nanosheet FET J Zhang, T Ando, CH Lee, A Reznicek, P Hashemi US Patent 10,553,679, 2020 | 38 | 2020 |
Germanium nMOSFETs with recessed channel and S/D: Contact, scalability, interface, and drain current exceeding 1 A/mm H Wu, M Si, L Dong, J Gu, J Zhang, DY Peide IEEE Transactions on Electron Devices 62 (5), 1419-1426, 2015 | 37 | 2015 |
Vertically stacked NFETS and PFETS with gate-all-around structure J Zhang, T Ando, P Hashemi, CH Lee, A Reznicek US Patent 10,381,438, 2019 | 30 | 2019 |
Multiple-Vt solutions in nanosheet technology for high performance and low power applications R Bao, K Watanabe, J Zhang, J Guo, H Zhou, A Gaul, M Sankarapandian, ... 2019 IEEE International Electron Devices Meeting (IEDM), 11.2. 1-11.2. 4, 2019 | 29 | 2019 |
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Ge CMOS: Breakthroughs of nFETs (Imax=714 mA/mm, gmax=590 mS/mm) by recessed channel and S/D H Wu, M Si, L Dong, J Zhang, DY Peide 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical …, 2014 | 28 | 2014 |
Gate-all-around field-effect transistor with asymmetric threshold voltage J Zhang, CH Lee, T Ando, P Hashemi, A Reznicek US Patent App. 16/147,680, 2020 | 24 | 2020 |