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Mehrdad Reshadi
Mehrdad Reshadi
Unknown affiliation
Verified email at reshadi.com
Title
Cited by
Cited by
Year
On-line behavioral analysis engine in mobile device with multiple analyzer model providers
R Gupta, M Bapst, MH Reshadi, S Kumar
US Patent 9,747,440, 2017
3482017
Instruction set compiled simulation: A technique for fast and flexible instruction set simulation
M Reshadi, P Mishra, N Dutt
Proceedings of the 40th Annual Design Automation Conference, 758-763, 2003
1952003
Pre-processing of scripts in web browsers
M Weber, MH Reshadi, GC Cascaval
US Patent App. 13/722,066, 2014
832014
Web browsing enhanced by cloud computing
B Khorashadi, MH Reshadi, SM Das
US Patent 9,146,909, 2015
822015
An efficient retargetable framework for instruction-set simulation
M Reshadi, N Bansal, P Mishra, N Dutt
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware …, 2003
622003
A cycle-accurate compilation algorithm for custom pipelined datapaths
M Reshadi, D Gajski
Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware …, 2005
602005
Zoomm: a parallel web browser engine for multicore mobile devices
C Cascaval, S Fowler, P Montesinos-Ortego, W Piekarski, M Reshadi, ...
ACM SIGPLAN Notices 48 (8), 271-280, 2013
562013
Pre-processing of scripts in web browsers
M Weber, MH Reshadi, GC Cascaval
US Patent App. 13/865,590, 2014
522014
Utilizing horizontal and vertical parallelism with a no-instruction-set compiler for custom datapaths
M Reshadi, B Gorjiara, D Gajski
2005 International Conference on Computer Design, 69-74, 2005
522005
Hybrid-compiled simulation: An efficient technique for instruction-set architecture simulation
M Reshadi, P Mishra, N Dutt
ACM Transactions on Embedded Computing Systems (TECS) 8 (3), 1-27, 2009
482009
Resource prefetching via sandboxed execution
MH Reshadi, M Weber
US Patent 9,898,445, 2018
412018
Concurrent parsing and processing of HTML and JAVASCRIPT®
CA Vick, B Wang, MMH Reshadi
US Patent 8,413,047, 2013
392013
Dynamic common sub-expression elimination during scheduling in high-level synthesis
S Gupta, M Reshadi, N Savoiu, N Dutt, R Gupta, A Nicolau
Proceedings of the 15th international symposium on System Synthesis, 261-266, 2002
362002
A retargetable framework for instruction-set architecture simulation
M Reshadi, N Dutt, P Mishra
ACM Transactions on Embedded Computing Systems (TECS) 5 (2), 431-452, 2006
352006
Protecting content integrity
MH Reshadi, R Gaunker, H Kolam, RB Venkat
US Patent App. 15/079,396, 2016
342016
Improved type specialization for dynamic scripting languages
MN Kedlaya, J Roesch, B Robatmili, M Reshadi, B Hardekopf
Proceedings of the 9th Symposium on Dynamic Languages, 37-48, 2013
332013
Generic pipelined processor modeling and high performance cycle-accurate simulator generation
M Reshadi, N Dutt
Design, Automation and Test in Europe, 786-791, 2005
332005
Collection management in document object model virtualization
M Reshadi, B Kennedy
US Patent 9,953,014, 2018
302018
Fast and efficient voltage scheduling by evolutionary slack distribution
B Gorji-Ara, P Chou, N Bagherzadeh, M Reshadi, D Jensen
ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE …, 2004
292004
Method and apparatus for optimized execution using resource utilization maps
MMH Reshadi, B Salamat, GC Cascaval, MS Fowler, A Ermolinskiy, ...
US Patent 9,804,893, 2017
272017
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