Gianluca Durelli
Gianluca Durelli
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On How to Improve FPGA-Based Systems Design Productivity via SDAccel
G Guidi, E Reggiani, L Di Tucci, G Durelli, M Blott, MD Santambrogio
2016 IEEE International Parallel and Distributed Processing Symposium …, 2016
312016
Workload-aware power optimization strategy for asymmetric multiprocessors
ED Sozzo, GC Durelli, EMG Trainiti, A Miele, MD Santambrogio, ...
Proceedings of the 2016 Conference on Design, Automation & Test in Europe …, 2016
302016
Floorplanning automation for partial-reconfigurable fpgas via feasible placements generation
M Rabozzi, GC Durelli, A Miele, J Lillis, MD Santambrogio
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (1), 151-164, 2017
242017
The Autonomic Operating System research project-Achievements and future directions
DB Bartolini, R Cattaneo, GC Durelli, M Maggio, MD Santambrogio, ...
2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 1-10, 2013
212013
On how to extract breathing rate from PPG signal using wearable devices
A Fusco, D Locatelli, F Onorati, GC Durelli, MD Santambrogio
2015 IEEE Biomedical Circuits and Systems Conference (BioCAS), 1-4, 2015
192015
On the automatic integration of hardware accelerators into FPGA-based embedded systems
C Pilato, A Cazzaniga, G Durelli, A Otero, D Sciuto, MD Santambrogio
Field Programmable Logic and Applications (FPL), 2012 22nd International …, 2012
142012
Automatic run-time manager generation for reconfigurable MPSoC architectures
G Durelli, C Pilato, A Cazzaniga, D Sciuto, MD Santambrogio
7th International Workshop on Reconfigurable and Communication-Centric …, 2012
132012
Para-sched: A reconfiguration-aware scheduler for reconfigurable architectures
R Cattaneo, R Bellini, G Durelli, C Pilato, MD Santambrogio, D Sciuto
2014 IEEE International Parallel & Distributed Processing Symposium …, 2014
122014
Smart technologies for effective reconfiguration: The faster approach
MD Santambrogio, D Pnevmatikatos, K Papadimitriou, C Pilato, ...
7th International Workshop on Reconfigurable and Communication-Centric …, 2012
92012
Accuracy to Throughput Trade-Offs for Reduced Precision Neural Networks on Reconfigurable Logic.
J Su, NJ Fraser, G Gambardella, M Blott, G Durelli, DB Thomas, ...
ARC, 29-42, 2018
82018
A runtime controller for openCL applications on heterogeneous system architectures
C Bolchini, S Cherubin, GC Durelli, S Libutti, A Miele, MD Santambrogio
ACM SIGBED Review 15 (1), 29-35, 2018
82018
SAVE: Towards efficient resource management in heterogeneous system architectures
G Durelli, M Coppola, K Djafarian, G Kornaros, A Miele, M Paolino, O Pell, ...
International Symposium on Applied Reconfigurable Computing, 337-344, 2014
82014
Towards exascale computing with heterogeneous architectures
K O'Brien, L Di Tucci, G Durelli, M Blott
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
72017
Smash: A heuristic methodology for designing partially reconfigurable mpsocs
R Cattaneo, C Pilato, GC Durelli, MD Santambrogio, D Sciuto
2013 International Symposium on Rapid System Prototyping (RSP), 102-108, 2013
72013
Using just-in-time code generation for transparent resource management in heterogeneous systems
H Riebler, G Vaz, C Plessl, EMG Trainiti, GC Durelli, E Del Sozzo, ...
2016 IEEE 2nd International Forum on Research and Technologies for Society …, 2016
62016
Hardware design automation of convolutional neural networks
A Solazzo, E Del Sozzo, I De Rose, M De Silvestri, GC Durelli, ...
2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 224-229, 2016
62016
On the design of autonomic techniques for runtime resource management in heterogeneous systems
GC DURELLI
Italy, 2016
62016
Towards a performance-as-a-service cloud.
DB Bartolini, F Sironi, M Maggio, G Durelli, D Sciuto, MD Santambrogio
SoCC, 26:1-26:2, 2013
62013
An orchestrated approach to efficiently manage resources in heterogeneous system architectures
C Bolchini, GC Durelli, A Miele, G Pallotta, MD Santambrogio
2015 33rd IEEE International Conference on Computer Design (ICCD), 200-207, 2015
52015
On the development of a runtime reconfigurable multicore system-on-chip
A Cazzaniga, G Durelli, C Pilato, D Sciuto, MD Santambrogio
2012 15th Euromicro Conference on Digital System Design, 132-135, 2012
52012
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