T-CREST: Time-predictable multi-core architecture for embedded systems M Schoeberl, S Abbaspour, B Akesson, N Audsley, R Capasso, J Garside, ... Journal of Systems Architecture 61 (9), 449-471, 2015 | 264 | 2015 |
A statically scheduled time-division-multiplexed network-on-chip for real-time systems M Schoeberl, F Brandner, J Sparsø, E Kasapaki 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip, 152-160, 2012 | 152 | 2012 |
Argo: A real-time network-on-chip architecture with an efficient GALS implementation E Kasapaki, M Schoeberl, RB Sørensen, C Müller, K Goossens, J Sparsø IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (2), 479-492, 2015 | 123 | 2015 |
An area-efficient network interface for a TDM-based network-on-chip J Sparsø, E Kasapaki, M Schoeberl 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013 | 61 | 2013 |
Argo: A time-elastic time-division-multiplexed noc using asynchronous routers E Kasapaki, J Sparsø 2014 20th IEEE International Symposium on Asynchronous Circuits and Systems …, 2014 | 43 | 2014 |
Router designs for an asynchronous time-division-multiplexed network-on-chip E Kasapaki, J Sparsø, RB Sørensen, K Goossens 2013 Euromicro Conference on Digital System Design, 319-326, 2013 | 18 | 2013 |
A statically scheduled time-division-multiplexed network-on-chip for real-time systems. In 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip M Schoeberl, F Brandner, J Sparsø, E Kasapaki IEEE, May, 152-160, 2012 | 9 | 2012 |
The Argo NoC: combining TDM and GALS E Kasapaki, J Sparsø 2015 European Conference on Circuit Theory and Design (ECCTD), 1-4, 2015 | 7 | 2015 |
Synthesis and layout of an asynchronous network-on-chip using standard EDA tools CT Müller, E Kasapaki, RB Sørensen, J Sparsø 2014 NORCHIP, 1-6, 2014 | 7 | 2014 |
A loosely synchronizing asynchronous router for TDM-scheduled NoCS I Kotleas, D Humphreys, RB Sørensen, E Kasapaki, F Brandner, J Sparsø 2014 Eighth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 151-158, 2014 | 7 | 2014 |
An EDA tool for the timing analysis, optimization and timing validation of asynchronous circuits E Kasapaki Master’s thesis, Computer Science Department, University of Crete, Greece …, 2008 | 5 | 2008 |
An Asynchronous Time-division-multiplexed Network-on-chip for Real-time Systems E Kasapaki Technical University of Denmark, 2015 | 4 | 2015 |
A neural network engine for resource constrained embedded systems Z Jelčicová, A Mardari, O Andersson, E Kasapaki, J Sparsø 2020 54th Asilomar Conference on Signals, Systems, and Computers, 125-131, 2020 | 3 | 2020 |
Actual-delay circuits on FPGA: Trading-off luts for speed E Kassapaki, PM Mattheakis, CP Sotiriou 2006 International Conference on Field Programmable Logic and Applications, 1-6, 2006 | 1 | 2006 |
PeakEngine: A Deterministic On-the-Fly Pruning Neural Network Accelerator for Hearing Instruments Z Jelčicová, E Kasapaki, O Andersson, J Sparsø IEEE Transactions on Very Large Scale Integration (VLSI) Systems 32 (1), 150-163, 2023 | | 2023 |
A Min-Heap-Based Accelerator for Deterministic On-the-Fly Pruning in Neural Networks Z Jelčicová, E Kasapaki, O Andersson, J SparsØ 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023 | | 2023 |
A reconfigurable mixed-time-criticality SDRAM controller SLM Goossens | | 2015 |
Argo Programming Guide E Kasapaki, RB Sørensen | | |