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Guido Araujo
Guido Araujo
IC-UNICAMP
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The ArchC architecture description language and tools
R Azevedo, S Rigo, M Bartholomeu, G Araujo, C Araujo, E Barros
International Journal of Parallel Programming 33 (5), 453-484, 2005
2082005
Processor description languages: applications and methodologies
P Mishra, N Dutt
Morgan Kaufmann, 2008
163*2008
ArchC: A SystemC-based architecture description language
S Rigo, G Araujo, M Bartholomeu, R Azevedo
16th Symposium on computer architecture and high performance computing, 66-73, 2004
1622004
Efficient datapath merging for partially reconfigurable architectures
N Moreano, E Borin, C De Souza, G Araujo
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
1412005
Optimal code generation for embedded memory non-homogeneous register architectures
G Araujo, S Malik
Proceedings of the 8th international symposium on System synthesis, 36-41, 1995
1101995
Software-based transparent and comprehensive control-flow error detection
E Borin, C Wang, Y Wu, G Araujo
Proceedings of the International Symposium on Code Generation and …, 2006
1082006
Code compression based on operand factorization
G Araujo, P Centoducatte, M Cortes, R Pannain
Proceedings. 31st Annual ACM/IEEE International Symposium on …, 1998
811998
Using register-transfer paths in code generation for heterogeneous memory-register architectures
G Araujo, S Malik, MTC Lee
Proceedings of the 33rd annual Design Automation Conference, 591-596, 1996
731996
An automatic testbench generation tool for a systemc functional verification methodology
KRG Da Silva, EUK Melcher, G Araujo, VA Pimenta
Proceedings of the 17th symposium on Integrated circuits and system design …, 2004
712004
Code generation algorithms for digital signal processors
GCS de Araujo
Princeton University, 1997
691997
High performance collision cross section calculation—HPCCS
L Zanotto, G Heerdt, PCT Souza, G Araujo, MS Skaf
Journal of computational chemistry 39 (21), 1675-1681, 2018
652018
Instruction set design and optimizations for address computation in DSP architectures
G Araujo, A Sudarsanam, S Malik
Proceedings of 9th International Symposium on Systems Synthesis, 102-107, 1996
621996
DawnCC: automatic annotation for data parallelism and offloading
G Mendonça, B Guimarães, P Alves, M Pereira, G Araújo, FMQ Pereira
ACM Transactions on Architecture and Code Optimization (TACO) 14 (2), 1-25, 2017
522017
Challenges in code generation for embedded processors
G Araujo, S Devadas, K Keutzer, S Liao
KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE, 48-48, 1995
51*1995
The design of dynamically reconfigurable datapath coprocessors
Z Huang, S Malik, N Moreano, G Araujo
ACM Transactions on Embedded Computing Systems (TECS) 3 (2), 361-384, 2004
482004
Datapath merging and interconnection sharing for reconfigurable architectures
N Moreano, G Araujo, Z Huang, S Malik
Proceedings of the 15th international symposium on System Synthesis, 38-43, 2002
432002
Expression-tree-based algorithms for code compression on embedded RISC architectures
G Araujo, P Centoducatte, R Azevedo, R Pannain
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on 8 (5), 530-533, 2000
392000
An efficient framework for high-level power exploration
F Klein, G Araujo, R Azevedo, R Leao, LCV dos Santos
2007 50th Midwest Symposium on Circuits and Systems, 1046-1049, 2007
342007
Exploring Memory Hierarchy with ArchC
P Viana, E Barros, S Rigo, R Azevedo, G Araújo
Computer Architecture and High Performance Computing, 2003. Proceedings …, 2003
342003
Code Generation for Fixed-Point DSPs
A Guido, M Sharad
31*
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Artikelen 1–20